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[82.149.19.102]) by smtp.gmail.com with ESMTPSA id t4-20020aa7d704000000b00463bc1ddc76sm3912226edq.28.2022.12.12.08.14.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 08:14:29 -0800 (PST) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Andre Przywara Cc: jagan@amarulasolutions.com, u-boot@lists.denx.de, linux-sunxi Subject: Re: [PATCH 0/8] sunxi: Update H616 DRAM driver Date: Mon, 12 Dec 2022 17:14:28 +0100 Message-ID: <2123971.irdbgypaU6@jernej-laptop> In-Reply-To: <20221212010451.6fc99b11@slackpad.lan> References: <20221211163213.98540-1-jernej.skrabec@gmail.com> <20221212010451.6fc99b11@slackpad.lan> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Hi Andre, Dne ponedeljek, 12. december 2022 ob 02:04:51 CET je Andre Przywara napisal(a): > On Sun, 11 Dec 2022 17:32:05 +0100 > Jernej Skrabec wrote: > > Hi Jernej, > > many thanks for putting this together! > I will have a more elaborate look at each patch later. > > > Current H616 DRAM driver is completely customized to Orange Pi Zero2 > > board, which is currently the only H616 board supported by U-Boot. > > Not anymore, I merged the X96 Mate support lately, after the DT got > merged into the Linux tree. Right. First part of sentence is still true, although I later remembered that some values are based on T95 values, those that are not used by Orange Pi Zero2. > > Those are the values for the box I came up with: > CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303 > CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e > CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1c12 > CONFIG_DRAM_SUN50I_H616_TPR0=0xc0000c05 > CONFIG_DRAM_SUN50I_H616_TPR10=0x2f0007 > CONFIG_DRAM_SUN50I_H616_TPR11=0xffffdddd > CONFIG_DRAM_SUN50I_H616_TPR12=0xfedf7557 > > based on this boot0 found in some firmware update image: > 00045400 be 02 00 ea 65 47 4f 4e 2e 42 54 30 cc ba f3 80 > |....eGON.BT0....| 00045410 00 c0 00 00 30 00 00 00 00 00 00 00 00 00 02 > 00 |....0...........| 00045420 00 00 02 00 00 00 00 00 00 00 00 00 34 2e > 30 00 |............4.0.| 00045430 00 00 00 00 03 00 00 00 88 02 00 00 03 > 00 00 00 |................| 00045440 03 03 03 03 0e 0e 0e 0e 12 1c 00 00 > 01 00 00 00 |................| 00045450 fb 30 00 00 00 00 00 00 40 08 00 > 00 04 00 00 00 |.0......@.......| 00045460 08 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 |................| 00045470 00 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 |................| 00045480 00 00 00 00 00 00 00 00 > 00 00 00 00 00 00 00 00 |................| 00045490 05 0c 00 c0 00 00 00 > 00 00 00 00 00 00 00 00 00 |................| 000454a0 80 80 80 33 07 00 > 2f 00 dd dd ff ff 57 75 df fe |...3../.....Wu..| 000454b0 40 00 00 00 00 > 00 00 00 00 00 00 00 08 00 02 01 |@...............| > > I would be grateful if you could verify this. Looks correct. I'll use them in my v2 patches. > > I built it, and it reported the 4GB correctly, also managed to boot into > Linux just fine. No extensive testing, nor didn't I compare register > dumps or disassembly (yet). > > Cheers, > Andre > > P.S. Any plans on upstreaming support for your T95 H616 TV > box? That would probably help the case here. Not really, X96 Mate is basically the same as T95, except DRAM configuration. As I said, I verified that these patches provide same register values as before. This includes those which were modeled after T95 DRAM values. Best regards, Jernej > > > Needless to say, this is not ideal for adding new boards. With changes > > in this series, all DDR3 boards are supported and all that is needed is > > just vendor DRAM values extracted from Android image. New DRAM types > > should also be easier to support, since a lot of constants used before > > are not really DRAM type dependent. > > > > Changes were verified by decompiling driver and generated values were > > compared to previous, hard coded ones. This was done without dram_para > > structures, so compiler was able to heavily optimize code and produce > > constants. > > > > Please take a look. > > > > Best regards, > > Jernej > > > > Jernej Skrabec (8): > > sunxi: Fix write to H616 DRAM CR register > > sunxi: cosmetic: Fix H616 DRAM driver code style > > sunxi: parameterize H616 DRAM ODT values > > sunxi: Convert H616 DRAM options to single setting > > sunxi: Always configure ODT on H616 DRAM > > sunxi: Make bit delay function in H616 DRAM code void > > sunxi: Parameterize bit delay code in H616 DRAM driver > > sunxi: Parameterize H616 DRAM code some more > > > > .../include/asm/arch-sunxi/dram_sun50i_h616.h | 18 + > > arch/arm/mach-sunxi/Kconfig | 67 +-- > > arch/arm/mach-sunxi/dram_sun50i_h616.c | 445 +++++++++++------- > > configs/orangepi_zero2_defconfig | 8 +- > > 4 files changed, 348 insertions(+), 190 deletions(-)