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[86.58.6.171]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d4fdbd1c7sm157742995e9.40.2025.03.25.09.13.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Mar 2025 09:13:47 -0700 (PDT) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: Peng Fan , Jaehoon Chung , Tom Rini , Andre Przywara Cc: u-boot@lists.denx.de, linux-sunxi@lists.linux.dev Subject: Re: FIXUP! sunxi: mmc: Improve reset procedure Date: Tue, 25 Mar 2025 17:13:46 +0100 Message-ID: <2772552.mvXUDI8C0e@jernej-laptop> In-Reply-To: <20250325142737.1702796-1-andre.przywara@arm.com> References: <20250325133953.1dab37c8@donnerap.manchester.arm.com> <20250325142737.1702796-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne torek, 25. marec 2025 ob 15:27:37 Srednjeevropski standardni =C4=8Das j= e Andre Przywara napisal(a): > Hi Jernej, >=20 > what do you think about this solution the A10 compilation problem? > That looks like a simple change, somewhat half of the way to the proper > solution. > If you agree, I'd squash that into your patch, then push it for U-Boot > next. Sure, I'm all for it. Sorry for missing this, it seems so obvious now. Best regards, Jernej >=20 > Cheers, > Andre >=20 >=20 > Signed-off-by: Andre Przywara > --- > drivers/mmc/sunxi_mmc.c | 10 +++++----- > drivers/mmc/sunxi_mmc.h | 4 ++++ > 2 files changed, 9 insertions(+), 5 deletions(-) >=20 > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c > index 31dbfb10c59..951e6acd34d 100644 > --- a/drivers/mmc/sunxi_mmc.c > +++ b/drivers/mmc/sunxi_mmc.c > @@ -449,23 +449,23 @@ out: > return error; > } > =20 > -static void sunxi_mmc_reset(struct sunxi_mmc *regs) > +static void sunxi_mmc_reset(void *regs) > { > /* Reset controller */ > - writel(SUNXI_MMC_GCTRL_RESET, ®s->gctrl); > + writel(SUNXI_MMC_GCTRL_RESET, regs + SUNXI_MMC_GCTRL); > udelay(1000); > =20 > if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) || IS_ENABLED(CONFIG_SUNXI_GEN_NCA= T2)) { > /* Reset card */ > - writel(SUNXI_MMC_HWRST_ASSERT, ®s->hwrst); > + writel(SUNXI_MMC_HWRST_ASSERT, regs + SUNXI_MMC_HWRST); > udelay(10); > - writel(SUNXI_MMC_HWRST_DEASSERT, ®s->hwrst); > + writel(SUNXI_MMC_HWRST_DEASSERT, regs + SUNXI_MMC_HWRST); > udelay(300); > =20 > /* Setup FIFO R/W threshold. Needed on H616. */ > writel(SUNXI_MMC_THLDC_READ_THLD(512) | > SUNXI_MMC_THLDC_WRITE_EN | > - SUNXI_MMC_THLDC_READ_EN, ®s->thldc); > + SUNXI_MMC_THLDC_READ_EN, regs + SUNXI_MMC_THLDC); > } > } > =20 > diff --git a/drivers/mmc/sunxi_mmc.h b/drivers/mmc/sunxi_mmc.h > index 9d55904c213..bc313dcabe0 100644 > --- a/drivers/mmc/sunxi_mmc.h > +++ b/drivers/mmc/sunxi_mmc.h > @@ -12,6 +12,10 @@ > =20 > #include > =20 > +#define SUNXI_MMC_GCTRL 0x000 > +#define SUNXI_MMC_HWRST 0x078 > +#define SUNXI_MMC_THLDC 0x100 > + > struct sunxi_mmc { > u32 gctrl; /* 0x00 global control */ > u32 clkcr; /* 0x04 clock control */ >=20