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[86.58.6.171]) by smtp.gmail.com with ESMTPSA id d5-20020a05600c3ac500b0041888577f1esm857952wms.10.2024.04.15.14.04.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 14:04:44 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: wens@csie.org Cc: samuel@sholland.org, sboyd@kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Chad Wagner Subject: Re: [PATCH] clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate change Date: Mon, 15 Apr 2024 23:04:43 +0200 Message-ID: <2929835.e9J7NaK4W3@jernej-laptop> In-Reply-To: References: <20231013181712.2128037-1-jernej.skrabec@gmail.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne sobota, 2. marec 2024 ob 12:42:11 GMT +2 je Chen-Yu Tsai napisal(a): > On Sat, Oct 14, 2023 at 2:17=E2=80=AFAM Jernej Skrabec wrote: > > > > While PLL CPUX clock rate change when CPU is running from it works in > > vast majority of cases, now and then it causes instability. This leads > > to system crashes and other undefined behaviour. After a lot of testing > > (30+ hours) while also doing a lot of frequency switches, we can't > > observe any instability issues anymore when doing reparenting to stable > > clock like 24 MHz oscillator. > > > > Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 C= CU") > > Reported-by: Chad Wagner > > Link: https://forum.libreelec.tv/thread/27295-orange-pi-3-lts-freezes/ > > Tested-by: Chad Wagner > > Signed-off-by: Jernej Skrabec >=20 > Reviewed-by: Chen-Yu Tsai >=20 Applied. Best regards, Jernej