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[82.149.12.148]) by smtp.gmail.com with ESMTPSA id p8-20020a05600c468800b0040c488e4fb5sm11794611wmo.40.2023.12.13.12.09.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 12:09:34 -0800 (PST) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Paul Kocialkowski Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Maxime Ripard , Laurent Pinchart , Michael Turquette , Stephen Boyd , Paul Kocialkowski Subject: Re: [PATCH v7 4/7] ARM: dts: sun8i: v3s: Add support for the ISP Date: Wed, 13 Dec 2023 21:09:32 +0100 Message-ID: <3267480.aeNJFYEL58@archlinux> In-Reply-To: <20231122141426.329694-5-paul.kocialkowski@bootlin.com> References: <20231122141426.329694-1-paul.kocialkowski@bootlin.com> <20231122141426.329694-5-paul.kocialkowski@bootlin.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" On Wednesday, November 22, 2023 3:14:22 PM CET Paul Kocialkowski wrote: > The V3s (and related platforms) come with an instance of the A31 ISP. > Even though it is very close to the A31 ISP, it is not exactly > register-compatible and a dedicated compatible only is used as a > result. > > Just like most other blocks of the camera pipeline, the ISP uses > the common CSI bus, module and ram clock as well as reset. > > A port connection to the ISP is added to CSI0 for convenience since > CSI0 serves for MIPI CSI-2 interface support, which is likely to > receive raw data that will need to be processed by the ISP to produce > a final image. > > The interconnects property is used to inherit the proper DMA offset. > > Signed-off-by: Paul Kocialkowski > --- > arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi | 35 ++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi > index d57612023aa4..1a1dcd36cba4 100644 > --- a/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi > +++ b/arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi > @@ -645,6 +645,14 @@ csi0_in_mipi_csi2: endpoint { > remote-endpoint = <&mipi_csi2_out_csi0>; > }; > }; > + > + port@2 { > + reg = <2>; > + > + csi0_out_isp: endpoint { > + remote-endpoint = <&isp_in_csi0>; > + }; > + }; > }; > }; > > @@ -703,5 +711,32 @@ csi1: camera@1cb4000 { > resets = <&ccu RST_BUS_CSI>; > status = "disabled"; > }; > + > + isp: isp@1cb8000 { > + compatible = "allwinner,sun8i-v3s-isp"; > + reg = <0x01cb8000 0x1000>; > + interrupts = ; > + clocks = <&ccu CLK_BUS_CSI>, > + <&ccu CLK_CSI1_SCLK>, > + <&ccu CLK_DRAM_CSI>; > + clock-names = "bus", "mod", "ram"; > + resets = <&ccu RST_BUS_CSI>; > + interconnects = <&mbus 5>; > + interconnect-names = "dma-mem"; Same as in previous patch, interconnects properties are not described in bindings, please update. Best regards, Jernej > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + isp_in_csi0: endpoint { > + remote-endpoint = <&csi0_out_isp>; > + }; > + }; > + }; > + }; > }; > }; >