From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F31AB21A0A for ; Wed, 17 Jan 2024 15:53:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705506806; cv=none; b=eRwxO7Rap7C/WylA+0mzo0YjNapQ1eNTegwNAfV6FMJEya7T1hZC2lXf+dGy58K8gKOa4XOU/YlzIrHwqkjOhT7Np8Jpjee4OQL1K+42jKHCCi3LAU5kCvNEAXe4bpueWLuX9M3v3iUdBr251GJ+ZEaByFqn2P0Kyhysm8P+vx8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705506806; c=relaxed/simple; bh=RN/TRAV+0bm5AnELjwjgmIYkKjf1u9x2nlP5hpU2ebs=; h=Received:DKIM-Signature:Received:Received:Received:Received: Message-ID:Date:MIME-Version:User-Agent:Subject:To:CC:References: Content-Language:From:In-Reply-To:Content-Type: Content-Transfer-Encoding:X-EXCLAIMER-MD-CONFIG; b=b8qrsyn/kx3Ze0GjXJ08PLoJmcsX5Jnfbe0f7Ztp35Z3buQI/yW5fwf0q1jt+WZhPBcqOX+LccQEXjGqUycGwQex1ZxyooeZMIytUsK1xBND900Bt8OQ7aOBh6Cwj6tvKvj5B8uZ+YniOUl68LXChsd1ma4gXboTjwIm98u+pV8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=PcSv0otR; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="PcSv0otR" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40HFqhek107121; Wed, 17 Jan 2024 09:52:44 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1705506764; bh=UqoXHpuOsyXayN31wfG4/f1gx1ZHV/XtpeqO3uEEUxI=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=PcSv0otRf22cpnWL4ex8dgpTo4kYPE2YfM2FC7uA12j/9tyFYkEgZ2AhY9W2/eqIL UCcCKSNc2rAQMq34hF8aMVsEK2gtD8n3zgq1B2X+uumQ7rbozLTXHpMAbIth4PU623 ZP/avpnMlwdRxFKiL0uRf9F+iQpxHCSIF8/AviO8= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40HFqh7o004410 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 17 Jan 2024 09:52:43 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 17 Jan 2024 09:52:43 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 17 Jan 2024 09:52:43 -0600 Received: from [10.249.42.149] ([10.249.42.149]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40HFqgSs087030; Wed, 17 Jan 2024 09:52:42 -0600 Message-ID: <55efd488-c6a0-4dca-baea-1fa93d13dd17@ti.com> Date: Wed, 17 Jan 2024 09:52:41 -0600 Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/11] ARM: dts: DRA7xx: Add device tree entry for SGX GPU To: Tony Lindgren CC: Frank Binns , Matt Coster , "H . Nikolaus Schaller" , Adam Ford , Ivaylo Dimitrov , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?UTF-8?Q?Beno=C3=AEt_Cousson?= , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Paul Cercueil , , , , , , , References: <20240109171950.31010-1-afd@ti.com> <20240109171950.31010-9-afd@ti.com> <20240110082924.GA5185@atomide.com> Content-Language: en-US From: Andrew Davis In-Reply-To: <20240110082924.GA5185@atomide.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 1/10/24 2:29 AM, Tony Lindgren wrote: > * Andrew Davis [240109 17:20]: >> --- a/arch/arm/boot/dts/ti/omap/dra7.dtsi >> +++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi >> @@ -850,12 +850,19 @@ target-module@56000000 { >> ; >> ti,sysc-sidle = , >> , >> - ; >> + , >> + ; > > You probably checked this already.. But just in case, can you please > confirm this is intentional. The documentation lists the smart wakeup > capability bit as reserved for dra7, maybe the documentation is wrong. > It was an intentional change, although I'm not sure it is correct :) This is how we had it in our "evil vendor tree" for years (back when it was hwmod based), so when converting these nodes to use "ti,sysc" I noticed this bit was set, but as you point out the documentation disagrees. I'd rather go with what has worked before, but it doesn't seem to break anything either way, so we could also break this change out into its own patch if you would prefer. Andrew > Regards, > > Tony >