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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id a22-20020aa7d916000000b0042dd4f9c464sm7226427edr.84.2022.06.05.13.23.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jun 2022 13:23:19 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: mripard@kernel.org, wens@csie.org, airlied@linux.ie, daniel@ffwll.ch, samuel@sholland.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, megi@xff.cz, Roman Stratiienko Cc: Roman Stratiienko Subject: Re: [PATCH v2] drm/sun4i: Enable output signal premultiplication for DE2/DE3 Date: Sun, 05 Jun 2022 22:23:18 +0200 Message-ID: <5826286.lOV4Wx5bFT@jernej-laptop> In-Reply-To: <20220605094018.9782-1-r.stratiienko@gmail.com> References: <20220605094018.9782-1-r.stratiienko@gmail.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Dne nedelja, 05. junij 2022 ob 11:40:18 CEST je Roman Stratiienko napisal(a): > Otherwise alpha value is discarded, resulting incorrect pixel > apperance on the display. > > This also fixes missing transparency for the most bottom layer. Can you explain that a bit more? Also, BSP driver never enables this bit. What are we doing differently? > > Test applications and videos w/ w/o this patch are available at [1]. > > [1]: https://github.com/GloDroid/glodroid_tests/issues/1 As stated in other emails, commit messages should not contain external links (per patch rules). Best regards, Jernej > Signed-off-by: Roman Stratiienko > > --- > Changelog: > > V2: Added code hunk missing in v1 > --- > drivers/gpu/drm/sun4i/sun8i_mixer.c | 5 +++-- > drivers/gpu/drm/sun4i/sun8i_mixer.h | 1 + > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c > b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 6b1711a9a71f..ba2932aaed08 > 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c > @@ -320,8 +320,9 @@ static void sun8i_mixer_mode_set(struct sunxi_engine > *engine, else > val = 0; > > - regmap_update_bits(engine->regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base), > - SUN8I_MIXER_BLEND_OUTCTL_INTERLACED, val); > + val |= SUN8I_MIXER_BLEND_OUTCTL_PREMULTIPLY; > + > + regmap_write(engine->regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base), val); > > DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", > interlaced ? "on" : "off"); > diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h > b/drivers/gpu/drm/sun4i/sun8i_mixer.h index ebfc276b2464..bc12c95af6f3 > 100644 > --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h > +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h > @@ -65,6 +65,7 @@ > #define SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(n) (0xf << ((n) << 2)) > #define SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(n) ((n) << 2) > > +#define SUN8I_MIXER_BLEND_OUTCTL_PREMULTIPLY BIT(0) > #define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED BIT(1) > > #define SUN50I_MIXER_BLEND_CSC_CTL_EN(ch) BIT(ch)