From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Chen-Yu Tsai <wens@csie.org>, Samuel Holland <samuel@sholland.org>
Cc: Samuel Holland <samuel@sholland.org>,
Linus Walleij <linus.walleij@linaro.org>,
Maxime Ripard <mripard@kernel.org>,
Vishnu Patekar <vishnupatekar0510@gmail.com>,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins
Date: Thu, 26 May 2022 22:49:43 +0200 [thread overview]
Message-ID: <7383317.EvYhyI6sBW@kista> (raw)
In-Reply-To: <20220526024956.49500-1-samuel@sholland.org>
Dne četrtek, 26. maj 2022 ob 04:49:56 CEST je Samuel Holland napisal(a):
> The other NAND pins on Port C use the "nand0" function name.
> "nand0" also matches all of the other Allwinner SoCs.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller
support")
> Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
> ---
>
> drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c b/drivers/pinctrl/
sunxi/pinctrl-sun8i-a83t.c
> index 4ada80317a3b..b5c1a8f363f3 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
> @@ -158,26 +158,26 @@ static const struct sunxi_desc_pin sun8i_a83t_pins[] =
{
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQ6
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQ6
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* D6
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQ7
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQ7
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* D7
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand"), /* DQS
*/
> + SUNXI_FUNCTION(0x2, "nand0"), /* DQS
*/
> SUNXI_FUNCTION(0x3, "mmc2")), /* RST
*/
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand")), /* CE2
*/
> + SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
> SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> - SUNXI_FUNCTION(0x2, "nand")), /* CE3
*/
> + SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
> /* Hole */
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> --
> 2.35.1
>
>
next prev parent reply other threads:[~2022-05-26 20:49 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-26 2:49 [PATCH] pinctrl: sunxi: a83t: Fix NAND function name for some pins Samuel Holland
2022-05-26 20:49 ` Jernej Škrabec [this message]
2022-06-03 22:22 ` Linus Walleij
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