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[82.149.12.148]) by smtp.gmail.com with ESMTPSA id p10-20020a5d458a000000b00336463625c0sm100880wrq.51.2023.12.13.12.11.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 12:11:53 -0800 (PST) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Paul Kocialkowski Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Maxime Ripard , Laurent Pinchart , Michael Turquette , Stephen Boyd , Paul Kocialkowski Subject: Re: [PATCH v7 5/7] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Date: Wed, 13 Dec 2023 21:11:52 +0100 Message-ID: <8310859.T7Z3S40VBb@archlinux> In-Reply-To: <20231122141426.329694-6-paul.kocialkowski@bootlin.com> References: <20231122141426.329694-1-paul.kocialkowski@bootlin.com> <20231122141426.329694-6-paul.kocialkowski@bootlin.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" On Wednesday, November 22, 2023 3:14:23 PM CET Paul Kocialkowski wrote: > MIPI CSI-2 is supported on the A83T with a dedicated controller that > covers both the protocol and D-PHY. It is connected to the only CSI > receiver with a fwnode graph link. Note that the CSI receiver supports > both this MIPI CSI-2 source and a parallel source. > > An empty port with a label for the MIPI CSI-2 sensor input is also > defined for convenience. > > Signed-off-by: Paul Kocialkowski Reviewed-by: Jernej Skrabec Best regards, Jernej > --- > arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi | 43 +++++++++++++++++++++ > 1 file changed, 43 insertions(+) > > diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi > index 94eb3bfc989e..b74c3f9e6598 100644 > --- a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi > +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi > @@ -1062,6 +1062,49 @@ csi: camera@1cb0000 { > clock-names = "bus", "mod", "ram"; > resets = <&ccu RST_BUS_CSI>; > status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@1 { > + reg = <1>; > + > + csi_in_mipi_csi2: endpoint { > + remote-endpoint = <&mipi_csi2_out_csi>; > + }; > + }; > + }; > + }; > + > + mipi_csi2: csi@1cb1000 { > + compatible = "allwinner,sun8i-a83t-mipi-csi2"; > + reg = <0x01cb1000 0x1000>; > + interrupts = ; > + clocks = <&ccu CLK_BUS_CSI>, > + <&ccu CLK_CSI_SCLK>, > + <&ccu CLK_MIPI_CSI>, > + <&ccu CLK_CSI_MISC>; > + clock-names = "bus", "mod", "mipi", "misc"; > + resets = <&ccu RST_BUS_CSI>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + mipi_csi2_in: port@0 { > + reg = <0>; > + }; > + > + mipi_csi2_out: port@1 { > + reg = <1>; > + > + mipi_csi2_out_csi: endpoint { > + remote-endpoint = <&csi_in_mipi_csi2>; > + }; > + }; > + }; > }; > > hdmi: hdmi@1ee0000 { >