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[2003:e4:1f30:5300:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id s7-20020a170906c30700b0094f410225c7sm10744283ejz.169.2023.06.01.09.51.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Jun 2023 09:51:14 -0700 (PDT) Date: Thu, 1 Jun 2023 18:51:11 +0200 From: Thierry Reding To: Jason Gunthorpe Cc: Andy Gross , Alim Akhtar , Bjorn Andersson , AngeloGioacchino Del Regno , Baolin Wang , Christophe Leroy , Gerald Schaefer , Heiko Stuebner , iommu@lists.linux.dev, Jernej Skrabec , Jonathan Hunter , Joerg Roedel , Kevin Tian , Konrad Dybcio , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-s390@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, Russell King , linuxppc-dev@lists.ozlabs.org, Marek Szyprowski , Matthias Brugger , Matthew Rosato , Michael Ellerman , Nicholas Piggin , Orson Zhai , Rob Clark , Robin Murphy , Samuel Holland , Krishna Reddy , Chen-Yu Tsai , Will Deacon , Yong Wu , Chunyan Zhang , Lu Baolu , Dmitry Osipenko , Nicolin Chen , Niklas Schnelle , Steven Price , Thierry Reding Subject: Re: [PATCH v2 05/25] iommu/tegra-gart: Remove tegra-gart Message-ID: References: <0-v2-8d1dc464eac9+10f-iommu_all_defdom_jgg@nvidia.com> <5-v2-8d1dc464eac9+10f-iommu_all_defdom_jgg@nvidia.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="0JJNQg2cyOE2ETg4" Content-Disposition: inline In-Reply-To: <5-v2-8d1dc464eac9+10f-iommu_all_defdom_jgg@nvidia.com> User-Agent: Mutt/2.2.10 (2023-03-25) --0JJNQg2cyOE2ETg4 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, May 15, 2023 at 09:00:38PM -0300, Jason Gunthorpe wrote: > Thierry says this is not used anymore, and doesn't think it ever will > be. The HW it supports is about 10 years old now and newer HW uses > different IOMMU drivers. >=20 > As this is the only driver with a GART approach, and it doesn't really > meet the driver expectations from the IOMMU core, let's just remove it > so we don't have to think about how to make it fit in. >=20 > It has a number of identified problems: > - The assignment of iommu_groups doesn't match the HW behavior >=20 > - It claims to have an UNMANAGED domain but it is really an IDENTITY > domain with a translation aperture. This is inconsistent with the core > expectation for security sensitive operations >=20 > - It doesn't implement a SW page table under struct iommu_domain so > * It can't accept a map until the domain is attached > * It forgets about all maps after the domain is detached > * It doesn't clear the HW of maps once the domain is detached > (made worse by having the wrong groups) >=20 > Cc: Thierry Reding > Cc: Dmitry Osipenko > Signed-off-by: Jason Gunthorpe > --- > arch/arm/configs/multi_v7_defconfig | 1 - > arch/arm/configs/tegra_defconfig | 1 - > drivers/iommu/Kconfig | 11 - > drivers/iommu/Makefile | 1 - > drivers/iommu/tegra-gart.c | 371 ---------------------------- > drivers/memory/tegra/mc.c | 34 --- > drivers/memory/tegra/tegra20.c | 28 --- > include/soc/tegra/mc.h | 26 -- > 8 files changed, 473 deletions(-) > delete mode 100644 drivers/iommu/tegra-gart.c To clarify, I think this hardware could very well be used again, but I don't think it makes sense to use it in the context of the IOMMU subsystem. If anybody wants to make use of this on Tegra20, it probably makes more sense to move the GART programming into whatever driver ends up using it instead of jumping through all these hoops just to make it work like something it isn't. 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