Re: [PATCH] spi: sunxi: wait for TX/RX fifo reset done

["Jernej Škrabec" <jernej.skrabec@gmail.com>]

Dne torek, 21. april 2026 ob 06:47:50 Srednjeevropski poletni čas je Yixun Lan napisal(a):
> Once reset SPI TX or RX fifo, the underlying hardware need to take
> some time to actually settle down, the two bits will automatically
> clear to 0, so use a poll mechanism to check status bits to make sure
> it's done correctly.
> 
> Signed-off-by: Yixun Lan <dlan@gentoo.org>
> ---
> On Cubie A7A board which using A733 SoC, we encoutered a SPI nor flash
> timeout issue, it turns out that the SPI fifo reset take a few time to
> settle down, Add a loop to poll the status.
> 
> This was the error message shows on A7A board once this issue happened.
> 
> => sf probe
> ERROR: sun4i_spi: Timeout transferring data
> Failed to initialize SPI flash at 0:0 (error -2)

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej