From: Jernej Skrabec <jernej.skrabec@gmail.com>
To: wens@kernel.org
Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org,
tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch,
samuel@sholland.org, dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
Jernej Skrabec <jernej.skrabec@gmail.com>
Subject: [PATCH 00/13] drm/sun4i: Assorted display fixes
Date: Mon, 3 Aug 2026 18:10:38 +0200 [thread overview]
Message-ID: <cover.1785770165.git.jernej.skrabec@gmail.com> (raw)
This series contains fixes for issues found while working on the DE3
and DE33 functionalities, used on H6 and H616 SoCs.
VI scaler and VI layer:
- V3s advertises a 2048 pixel YUV line buffer, while it only has half
of that, so wide YUV layers end up corrupted.
- Vertical scaler coefficients were picked based on the horizontal
scaling factor and chroma coefficients ignored subsampling.
- DE3 mixer initialization clears the whole register space, which also
clears the scaler global alpha. Since video mode takes alpha from
that register, subsampled YUV layers are fully transparent.
- Since the conversion to drm_fb_dma_get_gem_addr(), luma and chroma
plane addresses no longer describe the same pixel for odd source
offsets, which the scaler can't handle.
TCON TOP and TCON:
- Both mixer selectors reset to TCON 0. If both mixers end up selecting
the same TCON, output is black or corrupted, so park the other mixer
elsewhere.
- DSI and LVDS never called the output mux setup, so on D1 the mixer is
not routed to the TCON driving the panel.
HDMI:
- sun4i_hdmi_enable() ORs stale video timing polarity bits into the
packet control register, so the AVI infoframe is not sent for modes
with positive HSYNC polarity.
- The 594 MHz 8-bit MPLL entry doesn't lock on H6, so 4K@60 8-bit
doesn't come up.
The rest are an error propagation fix in sun4i_crtc_init(), which
otherwise oopses later on, and four patches fixing OF node and device
reference leaks, two of which accumulate on every mode set.
Tested on Tanix TX6 (H6, HDMI up to 4K@60) and Orange Pi 3 (H6,
TCON_LCD0 and TCON_TV0).
Some of the issues were found and/or fixed with Claude and GPT.
It would be nice if anyone could test V3s fix before and after. Testing
other fixes would be nice as well.
Best regards,
Jernej
Jernej Skrabec (13):
drm/sun4i: Fix V3s YUV scanline size
drm/sun4i: vi scaler: Fix coefficient selection
drm/sun4i: vi scaler: Restore opaque alpha in video modes
drm/sun4i: tcon-top: Keep mixer routes distinct
drm/sun4i: tcon: Set output mux for DSI and LVDS
drm/sun4i: tcon: Drop TCON TOP device reference
drm/sun4i: hdmi: Don't leak sync polarity bits into packet control
drm/sun4i: crtc: Propagate layer initialization error
drm/sun4i: tcon: Drop remote endpoint reference
drm/sun4i: dw-hdmi: Drop TCON TOP port reference
drm/sun4i: Drop node references while building component list
drm/sun4i: hdmi-phy: Fix H6 8-bit MPLL config at 594 MHz
drm/sun4i: Align VI buffer addresses for subsampled formats
drivers/gpu/drm/sun4i/sun4i_crtc.c | 2 +-
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c | 2 +-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 22 ++++----
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 2 +
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 2 +-
drivers/gpu/drm/sun4i/sun8i_mixer.c | 2 +-
drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 71 ++++++++++++++++++++-----
drivers/gpu/drm/sun4i/sun8i_tcon_top.h | 6 +++
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 20 ++++++-
drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 20 ++++---
drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 1 +
12 files changed, 119 insertions(+), 34 deletions(-)
--
2.43.0
reply other threads:[~2026-08-03 16:11 UTC|newest]
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