From: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH 01/11] ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 in tegra_resume
Date: Tue, 25 Jun 2013 17:27:45 +0800 [thread overview]
Message-ID: <1372152475-18617-2-git-send-email-josephl@nvidia.com> (raw)
In-Reply-To: <1372152475-18617-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The v7_invalidate_l1 was used for the L1 cache that come out from reset
in a undefined state. This is no need for Cortex-A15. We do it for A9
only.
Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/mach-tegra/reset-handler.S | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index 39dc9e7..75285a3 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -40,9 +40,11 @@
* re-enabling sdram.
*
* r6: SoC ID
+ * r8: CPU part number
*/
ENTRY(tegra_resume)
- bl v7_invalidate_l1
+ check_cpu_part_num 0xc09, r8, r9
+ bleq v7_invalidate_l1
cpu_id r0
tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
@@ -70,7 +72,8 @@ no_cpu0_chk:
str r1, [r2]
1:
- check_cpu_part_num 0xc09, r8, r9
+ mov32 r9, 0xc09
+ cmp r8, r9
bne not_ca9
#ifdef CONFIG_HAVE_ARM_SCU
/* enable SCU */
--
1.8.3.1
next prev parent reply other threads:[~2013-06-25 9:27 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-25 9:27 [PATCH 00/11] ARM: tegra114: add support for system suspend Joseph Lo
[not found] ` <1372152475-18617-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-25 9:27 ` Joseph Lo [this message]
2013-06-25 9:27 ` [PATCH 02/11] ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL Joseph Lo
2013-06-26 19:31 ` Stephen Warren
[not found] ` <51CB4174.1050700-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-27 10:07 ` Joseph Lo
2013-06-25 9:27 ` [PATCH 03/11] ARM: tegra114: set up the correct L2 data RAM latency for Cortex-A15 Joseph Lo
2013-06-25 9:27 ` [PATCH 04/11] ARM: tegra114: add low level support code for cluster power down Joseph Lo
2013-06-25 9:27 ` [PATCH 05/11] ARM: tegra114: shut off the CPU rail when the last CPU in suspend Joseph Lo
[not found] ` <1372152475-18617-6-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-26 19:36 ` Stephen Warren
[not found] ` <51CB42A0.4070103-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-27 10:10 ` Joseph Lo
2013-06-25 9:27 ` [PATCH 06/11] ARM: tegra114: hook tegra_tear_down_cpu function Joseph Lo
[not found] ` <1372152475-18617-7-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-27 10:13 ` Thierry Reding
2013-06-27 10:22 ` Joseph Lo
2013-06-27 17:48 ` Stephen Warren
[not found] ` <51CC7B01.30503-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-28 18:34 ` Thierry Reding
2013-06-25 9:27 ` [PATCH 07/11] ARM: tegra114: flowctrl: add support for cpu_suspend_enter/exit Joseph Lo
2013-06-25 9:27 ` [PATCH 08/11] clk: tegra114: add suspend/resume function for tegar_cpu_car_ops Joseph Lo
[not found] ` <1372152475-18617-9-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-26 19:38 ` Stephen Warren
[not found] ` <51CB432E.9080006-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-27 10:12 ` Joseph Lo
2013-07-30 21:21 ` Mike Turquette
2013-07-31 2:27 ` Joseph Lo
[not found] ` <1375237637.1231.1.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2013-07-31 3:37 ` Mike Turquette
2013-06-25 9:27 ` [PATCH 09/11] ARM: tegar: remove the limitation that Tegra114 can't support suspend Joseph Lo
[not found] ` <1372152475-18617-10-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-26 10:48 ` Thierry Reding
2013-06-26 11:20 ` Joseph Lo
2013-06-26 17:46 ` Stephen Warren
2013-06-26 19:40 ` Stephen Warren
[not found] ` <51CB4398.8050900-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-27 10:01 ` Joseph Lo
2013-06-25 9:27 ` [PATCH 10/11] ARM: dts: tegra114: dalmore: add GPIO power key support Joseph Lo
2013-06-25 9:27 ` [PATCH 11/11] ARM: dts: tegra114: dalmore: add PM configurations for PMC Joseph Lo
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