From: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH V2 04/11] ARM: tegra114: add low level support code for cluster power down
Date: Wed, 3 Jul 2013 17:50:40 +0800 [thread overview]
Message-ID: <1372845047-25147-5-git-send-email-josephl@nvidia.com> (raw)
In-Reply-To: <1372845047-25147-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
When the CPU cluster power down, the vGIC is powered down too. The
flow controller needs to monitor the legacy interrupt controller to
wake up CPU. So setting up the appropriate wake up event in flow
controller.
Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
V2:
* no change
---
arch/arm/mach-tegra/flowctrl.h | 2 ++
arch/arm/mach-tegra/sleep-tegra30.S | 6 +++++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-tegra/flowctrl.h b/arch/arm/mach-tegra/flowctrl.h
index e56a950..de0acb9 100644
--- a/arch/arm/mach-tegra/flowctrl.h
+++ b/arch/arm/mach-tegra/flowctrl.h
@@ -28,6 +28,8 @@
#define FLOW_CTRL_SCLK_RESUME (1 << 27)
#define FLOW_CTRL_HALT_CPU_IRQ (1 << 10)
#define FLOW_CTRL_HALT_CPU_FIQ (1 << 8)
+#define FLOW_CTRL_HALT_LIC_IRQ (1 << 11)
+#define FLOW_CTRL_HALT_LIC_FIQ (1 << 10)
#define FLOW_CTRL_HALT_GIC_IRQ (1 << 9)
#define FLOW_CTRL_HALT_GIC_FIQ (1 << 8)
#define FLOW_CTRL_CPU0_CSR 0x8
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index 6744161..ecad4ea 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -175,8 +175,12 @@ tegra30_enter_sleep:
orr r0, r0, #FLOW_CTRL_CSR_ENABLE
str r0, [r6, r2]
+ tegra_get_soc_id TEGRA_APB_MISC_BASE, r10
+ cmp r10, #TEGRA30
mov r0, #FLOW_CTRL_WAIT_FOR_INTERRUPT
- orr r0, r0, #FLOW_CTRL_HALT_CPU_IRQ | FLOW_CTRL_HALT_CPU_FIQ
+ orreq r0, r0, #FLOW_CTRL_HALT_CPU_IRQ | FLOW_CTRL_HALT_CPU_FIQ
+ orrne r0, r0, #FLOW_CTRL_HALT_LIC_IRQ | FLOW_CTRL_HALT_LIC_FIQ
+
cpu_to_halt_reg r2, r1
str r0, [r6, r2]
dsb
--
1.8.3.2
next prev parent reply other threads:[~2013-07-03 9:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-03 9:50 [PATCH V2 00/11] ARM: tegra114: add support for system suspend Joseph Lo
[not found] ` <1372845047-25147-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-07-03 9:50 ` [PATCH V2 01/11] ARM: tegra: do v7_invalidate_l1 only when CPU is Cortex-A9 Joseph Lo
2013-07-03 9:50 ` [PATCH V2 02/11] ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL Joseph Lo
2013-07-03 9:50 ` [PATCH V2 03/11] ARM: tegra114: set up the correct L2 data RAM latency for Cortex-A15 Joseph Lo
2013-07-03 9:50 ` Joseph Lo [this message]
2013-07-03 9:50 ` [PATCH V2 05/11] ARM: tegra114: shut off the CPU rail when the last CPU in suspend Joseph Lo
2013-07-03 9:50 ` [PATCH V2 06/11] ARM: tegra114: hook tegra_tear_down_cpu function Joseph Lo
2013-07-03 9:50 ` [PATCH V2 07/11] ARM: tegra114: flowctrl: add support for cpu_suspend_enter/exit Joseph Lo
2013-07-03 9:50 ` [PATCH V2 08/11] clk: tegra114: add suspend/resume function for tegra_cpu_car_ops Joseph Lo
2013-07-03 9:50 ` [PATCH V2 09/11] ARM: tegra: remove the limitation that Tegra114 can't support suspend Joseph Lo
2013-07-03 9:50 ` [PATCH V2 10/11] ARM: dts: tegra114: dalmore: add GPIO power key support Joseph Lo
[not found] ` <1372845047-25147-11-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-07-09 17:03 ` Stephen Warren
[not found] ` <51DC4274.8040607-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-07-10 1:06 ` Joseph Lo
2013-07-03 9:50 ` [PATCH V2 11/11] ARM: dts: tegra114: dalmore: add PM configurations for PMC Joseph Lo
2013-07-19 16:54 ` [PATCH V2 00/11] ARM: tegra114: add support for system suspend Stephen Warren
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