From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark Zhang Subject: [PATCH 1/2] ARM: tegra: Correct Tegra30 SMMU register map Date: Thu, 7 Nov 2013 11:58:25 +0800 Message-ID: <1383796706-10729-2-git-send-email-markz@nvidia.com> References: <1383796706-10729-1-git-send-email-markz@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1383796706-10729-1-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org, hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Mark Zhang List-Id: linux-tegra@vger.kernel.org Correct Tegra30 SMMU register map. Signed-off-by: Mark Zhang --- arch/arm/boot/dts/tegra30.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 2bd55cfd88ad..5f56243cc3f5 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -527,9 +527,12 @@ iommu { compatible = "nvidia,tegra30-smmu"; - reg = <0x7000f010 0x02c - 0x7000f1f0 0x010 - 0x7000f228 0x05c>; + reg = <0x7000f010 0x014 + 0x7000f030 0x00c + 0x7000f228 0x00c + 0x7000f238 0x024 + 0x7000f264 0x010 + 0x7000f278 0x00c>; nvidia,#asids = <4>; /* # of ASIDs */ dma-window = <0 0x40000000>; /* IOVA start & length */ nvidia,ahb = <&ahb>; -- 1.8.1.5