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From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH 3/7] ARM: tegra: Add Tegra124 host1x support
Date: Wed, 26 Feb 2014 17:20:25 +0100	[thread overview]
Message-ID: <1393431629-7040-3-git-send-email-thierry.reding@gmail.com> (raw)
In-Reply-To: <1393431629-7040-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The version of host1x found on Tegra124 SoCs isn't compatible to earlier
versions since some of the registers have moved in order to increase the
capabilities.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm/boot/dts/tegra124.dtsi | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 30a7377d5600..26dfe09e8410 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -9,6 +9,47 @@
 	compatible = "nvidia,tegra124";
 	interrupt-parent = <&gic>;
 
+	host1x@50000000 {
+		compatible = "nvidia,tegra124-host1x", "simple-bus";
+		reg = <0x50000000 0x00034000>;
+		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
+			     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+		clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
+		resets = <&tegra_car 28>;
+		reset-names = "host1x";
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ranges = <0x54000000 0x54000000 0x01000000>;
+
+		dc@54200000 {
+			compatible = "nvidia,tegra124-dc";
+			reg = <0x54200000 0x00040000>;
+			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&tegra_car TEGRA124_CLK_DISP1>,
+				 <&tegra_car TEGRA124_CLK_PLL_P>;
+			clock-names = "dc", "parent";
+			resets = <&tegra_car 27>;
+			reset-names = "dc";
+
+			nvidia,head = <0>;
+		};
+
+		dc@54240000 {
+			compatible = "nvidia,tegra124-dc";
+			reg = <0x54240000 0x00040000>;
+			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&tegra_car TEGRA124_CLK_DISP2>,
+				 <&tegra_car TEGRA124_CLK_PLL_P>;
+			clock-names = "dc", "parent";
+			resets = <&tegra_car 26>;
+			reset-names = "dc";
+
+			nvidia,head = <1>;
+		};
+	};
+
 	gic: interrupt-controller@50041000 {
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
-- 
1.8.4.2

  parent reply	other threads:[~2014-02-26 16:20 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-26 16:20 [PATCH v2 1/7] ARM: tegra: Overhaul Venice2 regulators Thierry Reding
     [not found] ` <1393431629-7040-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-02-26 16:20   ` [PATCH 2/7] ARM: tegra: Hook up SDMMC3 power-supply on Venice2 Thierry Reding
2014-02-26 16:20   ` Thierry Reding [this message]
2014-02-26 16:20   ` [PATCH 4/7] ARM: tegra: Add Tegra124 eDP support Thierry Reding
2014-02-26 16:20   ` [PATCH 5/7] ARM: tegra: Enable eDP for Venice2 Thierry Reding
2014-02-26 16:20   ` [PATCH 6/7] ARM: tegra: Add Tegra124 USB support Thierry Reding
     [not found]     ` <1393431629-7040-6-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-02-27 22:07       ` Stephen Warren
     [not found]         ` <530FB707.3050503-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-02-28 16:46           ` Thierry Reding
2014-02-26 16:20   ` [PATCH 7/7] ARM: tegra: Enable USB on Venice2 Thierry Reding

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