Linux Tegra architecture development
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From: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
	Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Peter De Schrijver
	<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Prashant Gaikwad
	<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Mike Turquette
	<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	"Rafael J. Wysocki" <rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org>,
	Viresh Kumar
	<viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Vince Hsu <vinceh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Tuomas Tynkkynen
	<ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH v4 10/16] ARM: tegra: Enable the DFLL on the Jetson TK1
Date: Thu, 21 Aug 2014 00:04:38 +0300	[thread overview]
Message-ID: <1408568684-11016-11-git-send-email-ttynkkynen@nvidia.com> (raw)
In-Reply-To: <1408568684-11016-1-git-send-email-ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Add the board-specific properties of the DFLL for the Jetson TK1 board.
On this board, the DFLL will take control of the sd0 regulator on the
on-board AS3722 PMIC.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm/boot/dts/tegra124-jetson-tk1.dts | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index 1b7c342..04134da 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -1453,7 +1453,7 @@
 				vin-ldo9-10-supply = <&vdd_5v0_sys>;
 				vin-ldo11-supply = <&vdd_3v3_run>;
 
-				sd0 {
+				vdd_cpu: sd0 {
 					regulator-name = "+VDD_CPU_AP";
 					regulator-min-microvolt = <700000>;
 					regulator-max-microvolt = <1400000>;
@@ -1662,6 +1662,12 @@
 		non-removable;
 	};
 
+	dfll@0,70110000 {
+		status = "okay";
+		vdd-cpu-supply = <&vdd_cpu>;
+		nvidia,i2c-fs-rate = <400000>;
+	};
+
 	ahub@0,70300000 {
 		i2s@0,70301100 {
 			status = "okay";
-- 
1.8.1.5

  parent reply	other threads:[~2014-08-20 21:04 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-20 21:04 [PATCH v4 00/16] Tegra124 CL-DVFS / DFLL clocksource, plus cpufreq Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 01/16] clk: tegra: Add binding for the Tegra124 DFLL clocksource Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 02/16] clk: tegra: Add library for the DFLL clock source (open-loop mode) Tuomas Tynkkynen
2014-08-28  5:58   ` David Riley
2014-08-20 21:04 ` [PATCH v4 03/16] clk: tegra: Add closed loop support for the DFLL Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 04/16] clk: tegra: Add functions for parsing CVB tables Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 05/16] clk: tegra: Add DFLL DVCO reset control for Tegra124 Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 06/16] clk: tegra: Add Tegra124 DFLL clocksource platform driver Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 07/16] clk: tegra: Save/restore CCLKG_BURST_POLICY on suspend Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 08/16] clk: tegra: Add the DFLL as a possible parent of the cclk_g clock Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 09/16] ARM: tegra: Add the DFLL to Tegra124 device tree Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 11/16] cpufreq: tegra124: Add device tree bindings Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 12/16] cpufreq: tegra: Rename tegra-cpufreq to tegra20-cpufreq Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 13/16] cpufreq: Add cpufreq driver for Tegra124 Tuomas Tynkkynen
2014-08-21  5:09   ` Viresh Kumar
2014-08-20 21:04 ` [PATCH v4 14/16] ARM: tegra: Add entries for cpufreq on Tegra124 Tuomas Tynkkynen
2014-08-20 21:04 ` [PATCH v4 15/16] ARM: tegra: Add CPU regulator to the Jetson TK1 device tree Tuomas Tynkkynen
     [not found] ` <1408568684-11016-1-git-send-email-ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-08-20 21:04   ` Tuomas Tynkkynen [this message]
2014-08-20 21:04   ` [PATCH v4 16/16] ARM: tegra: enable Tegra124 cpufreq driver by default Tuomas Tynkkynen
2014-09-02  0:40 ` [PATCH v4 00/16] Tegra124 CL-DVFS / DFLL clocksource, plus cpufreq Mike Turquette

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