linux-tegra.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Peter De Schrijver
	<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Mike Turquette
	<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
	Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Alexandre Courbot
	<gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH v3 00/20] Tegra210 Clock Support
Date: Fri, 1 May 2015 14:53:47 -0400	[thread overview]
Message-ID: <1430506447-29074-1-git-send-email-rklein@nvidia.com> (raw)

This patch series updates the tegra common clock driver and adds
support for the Tegra210 clocks. The clocks in Tegra210 changed
significantly in some ways from earlier generations, so to support
them, we need to extend our base framework a bit and add some new
features.

Some patches here also address issues found while adding features
and other cleanup type work.

v3:
  - Fixed pll_u hierarchy which was incorrect
  - Added a fix from Andrew Bresticker that was found while testing
    this code.

Andrew Bresticker (1):
  clk: tegra: pll: Fix issues with rates for VCO PLLs

Bill Huang (7):
  clk: tegra: pll-params: change misc_reg count from 3 -> 6
  clk: tegra: pll: Add logic for SS
  clk: tegra: pll: Add code to handle if resets are supported by PLL
  clk: tegra: pll: Adjust vco_min if SDM present
  clk: tegra: pll: Add dyn_ramp callback
  clk: tegra: pll: Add Set_default logic
  clk: tegra: Add Super Gen5 Logic

Rhyland Klein (12):
  clk: tegra: Modify tegra_audio_clk_init to accept more plls
  clk: tegra: periph: add new periph clks and muxes for Tegra210
  clk: tegra: pll: add tegra_pll_wait_for_lock to clk header
  clk: tegra: pll: simplify clk_enable_path
  clk: tegra: pll: update warning msg
  clk: tegra: pll: Don't unconditionally set LOCK flags
  clk: tegra: pll: Add logic for handling SDM data
  clk: tegra: pll: Add logic for out-of-table rates for T210
  clk: tegra: pll: Add specialized logic for T210
  clk: tegra: pll: Add support for PLLMB for T210
  clk: tegra: pll: Fix _pll_ramp_calc_pll logic and
    _calc_dynamic_ramp_rate
  clk: tegra210: add support for Tegra210 clocks

 .../bindings/clock/nvidia,tegra210-car.txt         |   56 +
 drivers/clk/tegra/Makefile                         |    2 +
 drivers/clk/tegra/clk-id.h                         |   64 +-
 drivers/clk/tegra/clk-pll.c                        |  697 ++++-
 drivers/clk/tegra/clk-tegra-audio.c                |   25 +-
 drivers/clk/tegra/clk-tegra-periph.c               |  257 +-
 drivers/clk/tegra/clk-tegra-super-gen5.c           |  150 ++
 drivers/clk/tegra/clk-tegra114.c                   |   30 +-
 drivers/clk/tegra/clk-tegra124.c                   |   31 +-
 drivers/clk/tegra/clk-tegra20.c                    |   18 +-
 drivers/clk/tegra/clk-tegra210.c                   | 2761 ++++++++++++++++++++
 drivers/clk/tegra/clk-tegra30.c                    |   31 +-
 drivers/clk/tegra/clk.h                            |   90 +-
 include/dt-bindings/clock/tegra210-car.h           |  401 +++
 14 files changed, 4468 insertions(+), 145 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra210-car.txt
 create mode 100644 drivers/clk/tegra/clk-tegra-super-gen5.c
 create mode 100644 drivers/clk/tegra/clk-tegra210.c
 create mode 100644 include/dt-bindings/clock/tegra210-car.h

-- 
1.7.9.5

             reply	other threads:[~2015-05-01 18:53 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-01 18:53 Rhyland Klein [this message]
2015-05-01 18:53 ` [PATCH v3 01/20] clk: tegra: Modify tegra_audio_clk_init to accept more plls Rhyland Klein
     [not found] ` <1430506447-29074-1-git-send-email-rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2015-05-01 18:53   ` [PATCH v3 02/20] clk: tegra: periph: add new periph clks and muxes for Tegra210 Rhyland Klein
2015-05-01 18:53   ` [PATCH v3 03/20] clk: tegra: pll: add tegra_pll_wait_for_lock to clk header Rhyland Klein
2015-05-01 18:54   ` [PATCH v3 14/20] clk: tegra: pll: Adjust vco_min if SDM present Rhyland Klein
2015-05-01 18:54   ` [PATCH v3 17/20] clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate Rhyland Klein
2015-05-01 18:54   ` [PATCH v3 18/20] clk: tegra: Add Super Gen5 Logic Rhyland Klein
2015-05-04 14:13   ` [PATCH v3 00/20] Tegra210 Clock Support Thierry Reding
     [not found]     ` <20150504141313.GA17642-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org>
2015-05-04 15:39       ` Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 04/20] clk: tegra: pll: simplify clk_enable_path Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 05/20] clk: tegra: pll: update warning msg Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 06/20] clk: tegra: pll-params: change misc_reg count from 3 -> 6 Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 07/20] clk: tegra: pll: Don't unconditionally set LOCK flags Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 08/20] clk: tegra: pll: Add logic for handling SDM data Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 09/20] clk: tegra: pll: Add logic for SS Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 10/20] clk: tegra: pll: Add logic for out-of-table rates for T210 Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 11/20] clk: tegra: pll: Add code to handle if resets are supported by PLL Rhyland Klein
2015-05-01 18:53 ` [PATCH v3 12/20] clk: tegra: pll: Add specialized logic for T210 Rhyland Klein
     [not found]   ` <1430506447-29074-13-git-send-email-rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2015-05-02  3:12     ` Jim Lin
     [not found]       ` <3e078ce64eff4ac992900523b1b67f19-Mplb3Xlf2OrYuxH7O460wFaTQe2KTcn/@public.gmane.org>
2015-05-04 15:40         ` Rhyland Klein
2015-05-01 18:54 ` [PATCH v3 13/20] clk: tegra: pll: Add support for PLLMB " Rhyland Klein
2015-05-01 18:54 ` [PATCH v3 15/20] clk: tegra: pll: Add dyn_ramp callback Rhyland Klein
2015-05-01 18:54 ` [PATCH v3 16/20] clk: tegra: pll: Add Set_default logic Rhyland Klein
2015-05-01 18:54 ` [PATCH v3 19/20] clk: tegra210: add support for Tegra210 clocks Rhyland Klein
2015-05-01 18:54 ` [PATCH v3 20/20] clk: tegra: pll: Fix issues with rates for VCO PLLs Rhyland Klein

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1430506447-29074-1-git-send-email-rklein@nvidia.com \
    --to=rklein-ddmlm1+adcrqt0dzr+alfa@public.gmane.org \
    --cc=gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org \
    --cc=pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org \
    --cc=sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org \
    --cc=swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org \
    --cc=thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).