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From: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Tom Warren <twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	Alexandre Courbot
	<acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH 1/2] ARM: tegra: move VPR configuration to a later stage
Date: Thu, 9 Jul 2015 16:33:00 +0900	[thread overview]
Message-ID: <1436427181-23904-2-git-send-email-acourbot@nvidia.com> (raw)
In-Reply-To: <1436427181-23904-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

U-boot is responsible for enabling the GPU DT node after all necessary
configuration (VPR setup for T124) is performed. In order to be able to
check whether this configuration has been performed right before booting
the kernel, make it happen during board_init().

Also move VPR configuration into the more generic gpu.c file, which will
also host other GPU-related functions, and let boards specify
individually whether they need VPR setup or not.

Signed-off-by: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Tom Warren <twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm/include/asm/arch-tegra/ap.h  |  9 -------
 arch/arm/include/asm/arch-tegra/gpu.h | 27 ++++++++++++++++++++
 arch/arm/mach-tegra/Makefile          |  2 +-
 arch/arm/mach-tegra/ap.c              |  3 ---
 arch/arm/mach-tegra/board2.c          |  3 +++
 arch/arm/mach-tegra/gpu.c             | 47 +++++++++++++++++++++++++++++++++++
 arch/arm/mach-tegra/vpr.c             | 35 --------------------------
 include/configs/tegra124-common.h     |  3 +++
 8 files changed, 81 insertions(+), 48 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-tegra/gpu.h
 create mode 100644 arch/arm/mach-tegra/gpu.c
 delete mode 100644 arch/arm/mach-tegra/vpr.c

diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h
index ca40e4e0bce6..2d58271e39f9 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -66,15 +66,6 @@ int tegra_get_sku_info(void);
 /* Do any chip-specific cache config */
 void config_cache(void);
 
-#if defined(CONFIG_TEGRA124)
-/* Do chip-specific vpr config */
-void config_vpr(void);
-#else
-static inline void config_vpr(void)
-{
-}
-#endif
-
 #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
 bool tegra_cpu_is_non_secure(void);
 #endif
diff --git a/arch/arm/include/asm/arch-tegra/gpu.h b/arch/arm/include/asm/arch-tegra/gpu.h
new file mode 100644
index 000000000000..b347a21835f5
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra/gpu.h
@@ -0,0 +1,27 @@
+/*
+ *  (C) Copyright 2015
+ *  NVIDIA Corporation <www.nvidia.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_TEGRA_GPU_H
+#define __ASM_ARCH_TEGRA_GPU_H
+
+#if defined(CONFIG_TEGRA_GPU)
+
+void config_gpu(void);
+bool gpu_configured(void);
+
+#else /* CONFIG_TEGRA_GPU */
+
+static inline void config_gpu(void)
+{
+}
+
+static inline bool gpu_configured(void)
+{
+	return false;
+}
+
+#endif /* CONFIG_TEGRA_GPU */
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index fefc180b130e..f6f5583d6dd1 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -24,7 +24,7 @@ obj-y += pinmux-common.o
 obj-y += powergate.o
 obj-y += xusb-padctl.o
 obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
-obj-$(CONFIG_TEGRA124) += vpr.o
+obj-$(CONFIG_TEGRA_GPU) += gpu.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 
 ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 0b94e8aaf9c3..70613f9c3649 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -218,7 +218,4 @@ void s_init(void)
 
 	/* enable SMMU */
 	smmu_enable();
-
-	/* init vpr */
-	config_vpr();
 }
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index ce9b6959efb1..1d7c5eff5587 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -29,6 +29,7 @@
 #include <asm/arch-tegra/sys_proto.h>
 #include <asm/arch-tegra/uart.h>
 #include <asm/arch-tegra/warmboot.h>
+#include <asm/arch-tegra/gpu.h>
 #ifdef CONFIG_TEGRA_CLOCK_SCALING
 #include <asm/arch/emc.h>
 #endif
@@ -125,6 +126,8 @@ int board_init(void)
 	clock_init();
 	clock_verify();
 
+	config_gpu();
+
 #ifdef CONFIG_TEGRA_SPI
 	pin_mux_spi();
 #endif
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
new file mode 100644
index 000000000000..b2fa50b5400e
--- /dev/null
+++ b/arch/arm/mach-tegra/gpu.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Tegra vpr routines */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/tegra.h>
+#include <asm/arch/mc.h>
+
+#include <fdt_support.h>
+
+static bool _configured;
+
+void config_gpu(void)
+{
+	struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+
+	/* Turn VPR off */
+	writel(0, &mc->mc_video_protect_size_mb);
+	writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
+	       &mc->mc_video_protect_reg_ctrl);
+	/* read back to ensure the write went through */
+	readl(&mc->mc_video_protect_reg_ctrl);
+
+	debug("configured VPR\n");
+
+	_configured = true;
+}
+
+bool vpr_configured(void)
+{
+	return _configured;
+}
diff --git a/arch/arm/mach-tegra/vpr.c b/arch/arm/mach-tegra/vpr.c
deleted file mode 100644
index f695811c9b6d..000000000000
--- a/arch/arm/mach-tegra/vpr.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/* Tegra vpr routines */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/tegra.h>
-#include <asm/arch/mc.h>
-
-/* Configures VPR.  Right now, all we do is turn it off. */
-void config_vpr(void)
-{
-	struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
-
-	/* Turn VPR off */
-	writel(0, &mc->mc_video_protect_size_mb);
-	writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
-	       &mc->mc_video_protect_reg_ctrl);
-	/* read back to ensure the write went through */
-	readl(&mc->mc_video_protect_reg_ctrl);
-}
diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h
index 1aee5c89f4c4..a05d2b53c8bf 100644
--- a/include/configs/tegra124-common.h
+++ b/include/configs/tegra124-common.h
@@ -70,4 +70,7 @@
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 
+/* GPU needs setup */
+#define CONFIG_TEGRA_GPU
+
 #endif /* _TEGRA124_COMMON_H_ */
-- 
2.4.4

  parent reply	other threads:[~2015-07-09  7:33 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-09  7:32 [PATCH 0/2] ARM: tegra: enable GPU DT node Alexandre Courbot
     [not found] ` <1436427181-23904-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2015-07-09  7:33   ` Alexandre Courbot [this message]
2015-07-09  7:33   ` [PATCH 2/2] ARM: tegra: enable GPU DT node when appropriate Alexandre Courbot
2015-07-23 11:46   ` [U-Boot] [PATCH 0/2] ARM: tegra: enable GPU DT node Andreas Färber
     [not found]     ` <55B0D427.2000704-l3A5Bk7waGM@public.gmane.org>
2015-07-23 17:51       ` Andreas Färber
2015-07-23 18:49       ` Mikko Perttunen
2015-07-24 13:07       ` Peter Robinson
     [not found]         ` <CALeDE9OJgJqRkkx+G_iOuyYGyxROyLR6LCLQ8aAEJ356DgA3AQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-08-04  9:01           ` Alexandre Courbot
2015-08-04 13:56       ` Andreas Färber
     [not found]         ` <55C0C474.5090200-l3A5Bk7waGM@public.gmane.org>
2015-08-04 15:40           ` Tom Warren
2015-08-04 23:24         ` Tom Warren
     [not found]           ` <17113c2735bb46caa20531a106f8e15d-wO81nVYWzR66sJks/06JalaTQe2KTcn/@public.gmane.org>
2015-08-06  7:57             ` Alexandre Courbot
     [not found]               ` <55C31377.2010204-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2015-08-06 15:07                 ` Tom Warren

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