From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rhyland Klein Subject: [PATCH 0/9] Tegra CLK Fixes Date: Thu, 10 Dec 2015 17:08:19 -0500 Message-ID: <1449785308-19546-1-git-send-email-rklein@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Sender: linux-clk-owner@vger.kernel.org To: Peter De Schrijver , Stephen Warren , Thierry Reding Cc: Michael Turquette , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Bresticker , Rhyland Klein List-Id: linux-tegra@vger.kernel.org This patch set fixes some issues found with the Tegra CLK drivers in testing. There are also a few patches which clean up the code and fix some naming issues. Andrew Bresticker (1): clk: tegra: pll: Fix potential sleeping-while-atomic Mark Kuo (2): clk: tegra: pll: Do not disable PLLE when under HW control clk: tegra: pll: Fix PLLE SS config Rhyland Klein (6): clk: tegra: Fix divider on VI_I2C clk: tegra210: Remove improper flags for lock_enable clk: tegra210: Fix naming of MISC registers clk: tegra: Fix the misnaming of nvenc from msenc clk: tegra210: fix pllx dyn step calculation clk: tegra210: Initialize PLL_D2 to a sane rate drivers/clk/tegra/clk-pll.c | 50 +++++++++++++-------- drivers/clk/tegra/clk-tegra-periph.c | 4 +- drivers/clk/tegra/clk-tegra210.c | 87 +++++++++++++++--------------------- 3 files changed, 71 insertions(+), 70 deletions(-) -- 1.9.1