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From: Dmitry Osipenko <digetx@gmail.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/3] clk: tegra: Mark HCLK, SCLK and EMC as critical
Date: Thu, 1 Mar 2018 16:33:29 +0300	[thread overview]
Message-ID: <1487f4a9-d924-3366-c86a-f1bd33ebb1bf@gmail.com> (raw)
In-Reply-To: <cbf3e9ff-f7e1-32c2-546d-85fd198c2a3b@gmail.com>

On 15.01.2018 13:56, Dmitry Osipenko wrote:
> On 10.01.2018 16:59, Dmitry Osipenko wrote:
>> Machine dies if HCLK, SCLK or EMC is disabled. Hence mark these clocks
>> as critical.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
>> ---
>>
>> Change log:
>> v2:     Fixed accidentally missed marking EMC as critical on Tegra30 and
>>         Tegra124. Switched to a use of common EMC gate definition on Tegra20
>>         and Tegra30.
>>
>> v3:     Dropped marking PLL_P outputs as critical, because seems they are
>>         not so critical. Although, I still haven't got a definitive answer
>>         about what exact HW functions are affected by the fixed-clocks.
>>         Anyway it should be cleaner to correct the actual drivers.
> 
> Stephen / Michael, would it be possible to schedule these patches for 4.16? My
> T20 and T30 devices aren't working without the 'critical clocks' patch. Things
> happen to work with the opensource u-boot, but not with the proprietary
> bootloader. It's probably not a big deal that out-of-tree devices are broken,
> although would be nice to have one problem less.

Guys, is there anything I could do to get these patches in linux-next?

  reply	other threads:[~2018-03-01 13:33 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-10 13:59 [PATCH v3 1/3] clk: tegra: Mark HCLK, SCLK and EMC as critical Dmitry Osipenko
2018-01-10 13:59 ` [PATCH v3 2/3] clk: tegra20: Correct PLL_C_OUT1 setup Dmitry Osipenko
2018-01-10 13:59 ` [PATCH v3 3/3] clk: tegra: Specify VDE clock rate Dmitry Osipenko
2018-01-15 10:56 ` [PATCH v3 1/3] clk: tegra: Mark HCLK, SCLK and EMC as critical Dmitry Osipenko
2018-03-01 13:33   ` Dmitry Osipenko [this message]
2018-03-08 14:44     ` Thierry Reding
2018-03-09 14:35       ` Dmitry Osipenko
2018-03-12  7:15         ` Thierry Reding
2018-03-12 12:37           ` Dmitry Osipenko
2018-03-12 13:48             ` Thierry Reding
2018-03-09 17:33       ` Stephen Boyd
2018-03-12  7:04         ` Thierry Reding
2018-03-12 22:55           ` Stephen Boyd

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