From: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org,
viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Mikko Perttunen
<mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH 2/3] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster
Date: Mon, 3 Apr 2017 15:42:24 +0300 [thread overview]
Message-ID: <1491223345-24386-2-git-send-email-mperttunen@nvidia.com> (raw)
In-Reply-To: <1491223345-24386-1-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
new file mode 100644
index 000000000000..50cd615219e9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
@@ -0,0 +1,22 @@
+NVIDIA Tegra CCPLEX_CLUSTER area
+
+Required properties:
+- compatible: Should contain one of the following:
+ - "nvidia,tegra186-ccplex-cluster": for Tegra186
+- reg: Must contain an (offset, length) pair of the register set for each
+ entry in reg-names.
+- reg-names: Must include the following entries:
+ - "a57": Public aperture for A57 CPU cluster
+ - "denver": Public aperture for Denver CPU cluster
+- nvidia,bpmp: Phandle to BPMP device that can be queried for OPP tables
+
+Example:
+
+ ccplex@e000000 {
+ compatible = "nvidia,tegra186-ccplex-cluster";
+ reg = <0x0 0x0e060000 0x0 0x1000>,
+ <0x0 0x0e070000 0x0 0x1000>;
+ reg-names = "a57", "denver";
+
+ nvidia,bpmp = <&bpmp>;
+ };
--
2.1.4
next prev parent reply other threads:[~2017-04-03 12:42 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-03 12:42 [PATCH 1/3] cpufreq: Add Tegra186 cpufreq driver Mikko Perttunen
2017-04-03 12:42 ` [PATCH 3/3] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186 Mikko Perttunen
[not found] ` <1491223345-24386-1-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-04-03 12:42 ` Mikko Perttunen [this message]
2017-04-03 14:06 ` [PATCH 2/3] dt-bindings: Add bindings for nvidia,tegra186-ccplex-cluster Thierry Reding
[not found] ` <20170403140617.GA22966-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>
2017-04-03 15:18 ` Mikko Perttunen
2017-04-03 14:24 ` Jon Hunter
2017-04-03 15:19 ` Mikko Perttunen
2017-04-03 14:47 ` [PATCH 1/3] cpufreq: Add Tegra186 cpufreq driver Thierry Reding
2017-04-03 15:38 ` Mikko Perttunen
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