From mboxrd@z Thu Jan 1 00:00:00 1970 From: Krishna Yarlagadda Subject: [PATCH V3 4/4] soc/tegra: select pinctrl for Tegra194 Date: Thu, 16 May 2019 17:23:14 +0530 Message-ID: <1558007594-14824-4-git-send-email-kyarlagadda@nvidia.com> References: <1558007594-14824-1-git-send-email-kyarlagadda@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1558007594-14824-1-git-send-email-kyarlagadda@nvidia.com> Sender: linux-kernel-owner@vger.kernel.org To: linus.walleij@linaro.org, thierry.reding@gmail.com, jonathanh@nvidia.com, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org, devicetree@vger.kernel.org Cc: pdeschrijver@nvidia.com, josephl@nvidia.com, smangipudi@nvidia.com, ldewangan@nvidia.com, vidyas@nvidia.com, Krishna Yarlagadda List-Id: linux-tegra@vger.kernel.org Select PINCTRL_TEGRA194 by default for Tegra194 SOC needed for dynamically controlling PCIe pins Signed-off-by: Krishna Yarlagadda --- drivers/soc/tegra/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig index a0b0344..6f0df55 100644 --- a/drivers/soc/tegra/Kconfig +++ b/drivers/soc/tegra/Kconfig @@ -108,6 +108,7 @@ config ARCH_TEGRA_186_SOC config ARCH_TEGRA_194_SOC bool "NVIDIA Tegra194 SoC" select MAILBOX + select PINCTRL_TEGRA194 select TEGRA_BPMP select TEGRA_HSP_MBOX select TEGRA_IVC -- 2.7.4