Re: [PATCH v3 2/4] dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node

[Dmitry Osipenko <digetx@gmail.com>]

04.10.2021 11:37, Krzysztof Kozlowski пишет:
> On 03/10/2021 03:32, Dmitry Osipenko wrote:
>> Some Tegra20 boards don't have RAM code stored in NVMEM, which is used for
>> the memory chip identification and the identity information should be read
>> out from LPDDR2 chip in this case. Document new sub-node containing generic
>> LPDDR2 properties that will be used for the memory chip identification if
>> RAM code isn't available. The identification is done by reading out memory
>> configuration values from generic LPDDR2 mode registers of SDRAM chip and
>> comparing them with the values of device-tree sub-node's.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> ---
>>  .../memory-controllers/nvidia,tegra20-emc.yaml  | 17 ++++++++++++++---
>>  1 file changed, 14 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.yaml
>> index cac6842dc8f1..65f7c3898ac4 100644
>> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.yaml
>> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.yaml
>> @@ -164,13 +164,14 @@ patternProperties:
>>        "#size-cells":
>>          const: 0
>>  
>> +      lpddr2-configuration:
> 
> Nodes should be named generic, so just lpddr2?

Yes

>> +        $ref: "jedec,lpddr2.yaml#"
>> +        type: object
>> +
>>      patternProperties:
>>        "^emc-table@[0-9]+$":
>>          $ref: "#/$defs/emc-table"
>>  
>> -    required:
>> -      - nvidia,ram-code
> 
> Isn't lpddr2-configuration required in such case? If not, probably you
> want either this or that (oneOf like in reserved-memory.yaml).

Thanks, oneOf will work.