Re: [PATCH 2/2] dt-bindings: memory: tegra: Add nvidia,tegra238-mc compatible

Jon Hunter
2026-03-31T12:33:05Z

On 31/03/2026 12:23, Ashish Mhetre wrote:
> Document the device tree binding for the Tegra238 memory controller.
> Tegra238 has 8 memory controller channels plus broadcast and stream-id
> registers.
>
> Add the stream ID header (nvidia,tegra238-mc.h) defining ISO and NISO
> stream IDs for SMMU configuration.
>
> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
> ---
> .../nvidia,tegra186-mc.yaml | 31 ++++++++
> .../dt-bindings/memory/nvidia,tegra238-mc.h | 74 +++++++++++++++++++
> 2 files changed, 105 insertions(+)
> create mode 100644 include/dt-bindings/memory/nvidia,tegra238-mc.h
>
> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
> index 7b03b589168b..e008cb1ccd28 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
> @@ -32,6 +32,7 @@ properties:
> - nvidia,tegra186-mc
> - nvidia,tegra194-mc
> - nvidia,tegra234-mc
> + - nvidia,tegra238-mc
> - nvidia,tegra264-mc
>
> reg:
> @@ -266,6 +267,36 @@ allOf:
>
> interrupt-names: false
>
> + - if:
> + properties:
> + compatible:
> + const: nvidia,tegra238-mc
> + then:
> + properties:
> + reg:
> + minItems: 10
> + maxItems: 10
> + description: 8 memory controller channels, 1 broadcast, and 1 for stream-id registers

To be consistent with existing bindings, this should be "9 memory
controller channels and 1 for stream-id registers". It appears that the
broadcast is just consider to be a memory controller channel.

Jon

--
nvpublic