From: Mikko Perttunen <cyndis@kapsi.fi>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
thierry.reding@gmail.com, jonathanh@nvidia.com,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
digetx@gmail.com
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Mikko Perttunen <mperttunen@nvidia.com>
Subject: Re: [PATCH v1 03/13] arm64: tegra: Add Host1x and VIC on Tegra234
Date: Tue, 17 May 2022 11:38:52 +0300 [thread overview]
Message-ID: <1fccdfe8-d44c-2d56-e572-628998efc985@kapsi.fi> (raw)
In-Reply-To: <424b02f3-eb53-68d0-bfee-5488dbcefa71@linaro.org>
On 5/17/22 11:01, Krzysztof Kozlowski wrote:
> On 16/05/2022 12:02, cyndis@kapsi.fi wrote:
>> From: Mikko Perttunen <mperttunen@nvidia.com>
>>
>> Add device tree nodes for Host1x and VIC on Tegra234.
>>
>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
>> ---
>> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 46 ++++++++++++++++++++++++
>> 1 file changed, 46 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> index cb3af539e477..cae68e59580c 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> @@ -454,6 +454,52 @@ misc@100000 {
>> status = "okay";
>> };
>>
>> + host1x@13e00000 {
>
> Generic node names, if that possible. Since the bindings do not exist in
> the next, I actually cannot figure out what's host1x...
Host1x is a hardware block that provides programmable DMA channels, HW
synchronization primitives, and virtualization support for IP blocks
connected to its "host1x bus". So far I haven't found a one or two word
way to describe it despite efforts. In any case, considering all the
existing documentation and device trees that use this name, I'd prefer
not changing it (especially as I don't know what else it could be called).
>
>> + compatible = "nvidia,tegra234-host1x";
>> + reg = <0x13e00000 0x10000>,
>> + <0x13e10000 0x10000>,
>> + <0x13e40000 0x10000>;
>> + reg-names = "common", "hypervisor", "vm";
>> + interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "syncpt0", "syncpt1", "syncpt2", "syncpt3", "syncpt4",
>> + "syncpt5", "syncpt6", "syncpt7", "host1x";
>> + clocks = <&bpmp TEGRA234_CLK_HOST1X>;
>> + clock-names = "host1x";
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + ranges = <0x15000000 0x15000000 0x01000000>;
>> + interconnects = <&mc TEGRA234_MEMORY_CLIENT_HOST1XDMAR &emc>;
>> + interconnect-names = "dma-mem";
>> + iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>;
>> +
>> + vic@15340000 {
>
> The same... vic is usually a vectored interrupt controller, so this
> should be interrupt-controller. Unless it is something entirely else, so
> then you need to come with a generic name.
VIC here is video image compositor (with various other 2d operations). I
suppose I can invent some generic name. Any thoughts, Thierry?
Mikko
>
>
> Best regards,
> Krzysztof
next prev parent reply other threads:[~2022-05-17 8:39 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-16 10:02 [PATCH v1 00/13] Host1x support on Tegra234 cyndis
2022-05-16 10:02 ` [PATCH v1 01/13] dt-bindings: Add bindings for Tegra234 Host1x and VIC cyndis
2022-05-16 16:33 ` Rob Herring
2022-05-17 8:18 ` Mikko Perttunen
2022-05-16 10:02 ` [PATCH v1 02/13] dt-bindings: Add headers for Host1x and VIC on Tegra234 cyndis
2022-05-17 8:02 ` Krzysztof Kozlowski
2022-05-17 8:41 ` Mikko Perttunen
2022-05-17 8:43 ` Krzysztof Kozlowski
2022-05-17 8:48 ` Mikko Perttunen
2022-05-16 10:02 ` [PATCH v1 03/13] arm64: tegra: Add " cyndis
2022-05-17 8:01 ` Krzysztof Kozlowski
2022-05-17 8:38 ` Mikko Perttunen [this message]
2022-05-17 13:33 ` Krzysztof Kozlowski
2022-05-16 10:02 ` [PATCH v1 04/13] gpu: host1x: Deduplicate hardware headers cyndis
2022-05-16 10:02 ` [PATCH v1 05/13] gpu: host1x: Simplify register mapping and add common aperture cyndis
2022-05-16 10:02 ` [PATCH v1 06/13] gpu: host1x: Program virtualization tables cyndis
2022-05-16 10:02 ` [PATCH v1 07/13] gpu: host1x: Allow reset to be missing cyndis
2022-05-16 10:02 ` [PATCH v1 08/13] gpu: host1x: Program interrupt destinations on Tegra234 cyndis
2022-05-16 10:02 ` [PATCH v1 09/13] gpu: host1x: Tegra234 device data and headers cyndis
2022-05-16 10:02 ` [PATCH v1 10/13] gpu: host1x: Rewrite job opcode sequence cyndis
2022-05-16 10:02 ` [PATCH v1 11/13] gpu: host1x: Add MLOCK release code on Tegra234 cyndis
2022-05-16 10:02 ` [PATCH v1 12/13] gpu: host1x: Use RESTART_W to skip timed out jobs on Tegra186+ cyndis
2022-05-16 10:02 ` [PATCH v1 13/13] drm/tegra: vic: Add Tegra234 support cyndis
2022-06-03 9:38 ` [PATCH v1 00/13] Host1x support on Tegra234 Dmitry Osipenko
2022-06-08 18:59 ` Mikko Perttunen
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