Re: [PATCH 2/2] ARM: Tegra: Seaboard: Add devicetree support

[Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>]

On Sun, May 01, 2011 at 08:46:04AM -0600, Grant Likely wrote:
> On Sun, May 1, 2011 at 8:38 AM, Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org> wrote:
> > Hi,
> >
> > On Fri, Apr 29, 2011 at 10:12:31PM -0600, Stephen Warren wrote:
> >> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> >> ---
> >>  arch/arm/boot/dts/tegra-seaboard.dts |   33 +++++++++++++++++++++++++++++++++
> >>  arch/arm/mach-tegra/Makefile.boot    |    1 +
> >>  2 files changed, 34 insertions(+), 0 deletions(-)
> >>  create mode 100644 arch/arm/boot/dts/tegra-seaboard.dts
> >>
> >> diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
> >> new file mode 100644
> >> index 0000000..d5c9ad7
> >> --- /dev/null
> >> +++ b/arch/arm/boot/dts/tegra-seaboard.dts
> >> @@ -0,0 +1,33 @@
> >> +/dts-v1/;
> >> +/include/ "tegra250.dts"
> >> +
> >> +/ {
> >> +     model = "NVIDIA Harmony";
> >
> > NVIDIA Seaboard?
> >
> >> +     compatible = "nvidia,seaboard", "nvidia,tegra250";
> >> +
> >> +     chosen {
> >> +             bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootdelay=2";
> >
> > I'm partial to rootwait instead of rootdelay, a little less fragile for slow
> > devices.
> >
> >> +     memory {
> >> +             device_type = "memory";
> >> +             reg = < 0x00000000 0x1C000000
> >> +                     0x20000000 0x20000000 >;
> >> +     };
> >
> > I guess a node for the graphics memory could be warranted
> 
> I've modified this in devicetree test to specify the entire memory
> range, and carve out 0x1c000000..0x1fffffff with a memreserve section.
> 
> >
> >> +
> >> +     serial@70006300 {
> >> +             status = "ok";
> >> +             clock-frequency = < 216000000 >;
> >> +     };
> >> +
> >> +     sdhci@c8000400 {
> >> +             status = "ok";
> >> +             gpios = <&gpio 69 0>, /* cd, gpio PI5 */
> >> +                     <&gpio 57 0>, /* wp, gpio PH1 */
> >> +                     <&gpio 70 0>; /* power, gpio PI6 */
> >
> > How would you represent just one missing gpio here? It might be better
> > to have separate properties for each.
> 
> The gpio binding allows for empty entries by using '0' for the phandle.

Hm, I'm still not much a fan of an opaque 3-entry array instead of named
entries but I'm ok with either I suppose. How do other bindings do similar things?


-Olof