[PATCH] arm/tegra: Harmony: Configure PMC for low-level interrupts

[PATCH] arm/tegra: Harmony: Configure PMC for low-level interrupts

[Stephen Warren]

Without this, the PMC continually detects an interrupt when the PMU_IRQ
line is high, causing the tps6686x IRQ handler thread to hog an entire
CPU.

This change was originally written by Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for Seaboard
in the ChromeOS kernel.

Long-term, this should probably be moved into some kind of PMU driver,
or perhaps integrated into the GPIO/IRQ/pinmux system?

Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 arch/arm/mach-tegra/board-harmony-power.c |   13 ++++++++++++-
 1 files changed, 12 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c
index 5ad8b2f..21d1285 100644
--- a/arch/arm/mach-tegra/board-harmony-power.c
+++ b/arch/arm/mach-tegra/board-harmony-power.c
@@ -18,10 +18,11 @@
 #include <linux/i2c.h>
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
-
+#include <linux/io.h>
 #include <linux/regulator/machine.h>
 #include <linux/mfd/tps6586x.h>
 
+#include <mach/iomap.h>
 #include <mach/irqs.h>
 
 #include "board-harmony.h"
@@ -113,6 +114,16 @@ static struct i2c_board_info __initdata harmony_regulators[] = {
 
 int __init harmony_regulator_init(void)
 {
+	void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
+	u32 pmc_ctrl;
+
+	/*
+	 * Configure the power management controller to trigger PMU
+	 * interrupts when low
+	 */
+	pmc_ctrl = readl(pmc + PMC_CTRL);
+	writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
+
 	i2c_register_board_info(3, harmony_regulators, 1);
 
 	return 0;
-- 
1.7.0.4

RE: [PATCH] arm/tegra: Harmony: Configure PMC for low-level interrupts

[Stephen Warren]

Stephen Warren wrote at Wednesday, September 21, 2011 4:11 PM:
> Without this, the PMC continually detects an interrupt when the PMU_IRQ
> line is high, causing the tps6686x IRQ handler thread to hog an entire
> CPU.
> 
> This change was originally written by Wei Ni <wni@nvidia.com> for Seaboard
> in the ChromeOS kernel.
> 
> Long-term, this should probably be moved into some kind of PMU driver,
> or perhaps integrated into the GPIO/IRQ/pinmux system?

Olof, is this change OK for inclusion? Or, should we create some kind
of PMU driver and interrupt controller to solve this?

Thanks.

>  int __init harmony_regulator_init(void)
>  {
> +	void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
> +	u32 pmc_ctrl;
> +
> +	/*
> +	 * Configure the power management controller to trigger PMU
> +	 * interrupts when low
> +	 */
> +	pmc_ctrl = readl(pmc + PMC_CTRL);
> +	writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
> +
>  	i2c_register_board_info(3, harmony_regulators, 1);
> 
>  	return 0;

-- 
nvpublic

Re: [PATCH] arm/tegra: Harmony: Configure PMC for low-level interrupts

[Olof Johansson]

On Tue, Oct 11, 2011 at 10:03 AM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
> Stephen Warren wrote at Wednesday, September 21, 2011 4:11 PM:
>> Without this, the PMC continually detects an interrupt when the PMU_IRQ
>> line is high, causing the tps6686x IRQ handler thread to hog an entire
>> CPU.
>>
>> This change was originally written by Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for Seaboard
>> in the ChromeOS kernel.
>>
>> Long-term, this should probably be moved into some kind of PMU driver,
>> or perhaps integrated into the GPIO/IRQ/pinmux system?
>
> Olof, is this change OK for inclusion? Or, should we create some kind
> of PMU driver and interrupt controller to solve this?

I'm OK with it going in now as it is, but as we move to more things to
device-tree, having a common piece of code that does it based on
properties there would make sense. Today I think every single board
needs it.

I'll pick up the patch and push it out later today.


-Olof

Re: [PATCH] arm/tegra: Harmony: Configure PMC for low-level interrupts

[Olof Johansson]

On Wed, Sep 21, 2011 at 04:10:40PM -0600, Stephen Warren wrote:
> Without this, the PMC continually detects an interrupt when the PMU_IRQ
> line is high, causing the tps6686x IRQ handler thread to hog an entire
> CPU.
> 
> This change was originally written by Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> for Seaboard
> in the ChromeOS kernel.
> 
> Long-term, this should probably be moved into some kind of PMU driver,
> or perhaps integrated into the GPIO/IRQ/pinmux system?
> 
> Signed-off-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Thanks, applied to for-3.2/features.


-Olof