From: Thierry Reding <thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
To: Mark Zhang <markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH 1/2] ARM: tegra: Add Tegra20 host1x support
Date: Tue, 13 Nov 2012 08:52:47 +0100 [thread overview]
Message-ID: <20121113075247.GB8409@avionic-0098.mockup.avionic-design.de> (raw)
In-Reply-To: <50A1FA7C.4010507-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 1817 bytes --]
On Tue, Nov 13, 2012 at 03:45:00PM +0800, Mark Zhang wrote:
> On 11/09/2012 09:20 PM, Thierry Reding wrote:
> > @@ -116,6 +122,9 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
> > { "sbc2", "pll_p", 100000000, false },
> > { "sbc3", "pll_p", 100000000, false },
> > { "sbc4", "pll_p", 100000000, false },
> > + { "host1x", "pll_c", 144000000, false },
> > + { "disp1", "pll_p", 600000000, false },
> > + { "disp2", "pll_p", 600000000, false },
>
> I think here the parent of disp2 should be "pll_d_out0", not "pll_p".
> Right now pll_p has not a proper clock setting to make 148.5MHz 1080p
> HDMI happy. In addition, you add the 297MHz in pll_d frequency table
> next and I think this is for disp2 has a proper clock rate to support HDMI.
[...]
> > @@ -1051,6 +1053,9 @@ static struct clk_duplicate tegra_clk_duplicates[] = {
> > CLK_DUPLICATE("pll_p_out3", "tegra-i2c.1", "fast-clk"),
> > CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"),
> > CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"),
> > + CLK_DUPLICATE("pll_p", "tegra-dc.0", "parent"),
> > + CLK_DUPLICATE("pll_p", "tegra-dc.1", "parent"),
> > + CLK_DUPLICATE("pll_d_out0", "tegra-hdmi", "parent"),
> > };
>
> The same with my above comments, the tegra-dc.1's parent should be
> pll_d_out0.
The way this works is that for HDMI it is required that the DC and HDMI
blocks have the same parent. So what really happens is that once you
setup one of the DCs to work with HDMI, its clock will automatically be
reparented to the HDMI parent clock, which in this case is "pll_d_out0".
Thierry
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next prev parent reply other threads:[~2012-11-13 7:52 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-09 13:20 [PATCH 0/2] Device tree updates for host1x support Thierry Reding
2012-11-09 13:20 ` [PATCH 1/2] ARM: tegra: Add Tegra20 " Thierry Reding
[not found] ` <1352467202-27903-2-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
2012-11-12 9:39 ` Mark Zhang
[not found] ` <50A0C3BF.90509-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 4:38 ` Mark Zhang
[not found] ` <50A1CECA.3090804-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 6:41 ` Thierry Reding
[not found] ` <20121113064135.GA31443-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-13 7:37 ` Mark Zhang
2012-11-14 8:35 ` Terje Bergström
[not found] ` <50A357D3.9080002-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-14 8:49 ` Thierry Reding
[not found] ` <20121114084931.GA31837-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-14 10:23 ` Terje Bergström
[not found] ` <50A3712E.7000104-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-14 10:54 ` Thierry Reding
2012-11-14 16:19 ` Stephen Warren
[not found] ` <50A3C485.7080704-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-14 16:45 ` Terje Bergström
[not found] ` <50A3CAA3.2060908-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-14 18:12 ` Stephen Warren
2012-11-14 20:04 ` Thierry Reding
[not found] ` <20121114200415.GA10335-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-14 20:15 ` Stephen Warren
[not found] ` <50A3FBFA.3080008-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-14 20:21 ` Thierry Reding
2012-11-15 6:56 ` Terje Bergström
2012-11-15 7:11 ` Thierry Reding
2012-11-14 15:01 ` Thierry Reding
[not found] ` <20121114150125.GA11050-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-14 15:29 ` Terje Bergström
[not found] ` <50A3B8DD.7010607-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-14 15:33 ` Thierry Reding
2012-11-13 7:45 ` Mark Zhang
[not found] ` <50A1FA7C.4010507-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 7:52 ` Thierry Reding [this message]
[not found] ` <20121113075247.GB8409-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-13 8:00 ` Mark Zhang
[not found] ` <50A1FE2F.8000107-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 8:04 ` Thierry Reding
2012-11-13 8:29 ` Mark Zhang
2012-11-09 13:20 ` [PATCH 2/2] ARM: tegra: Add Tegra30 " Thierry Reding
[not found] ` <1352467202-27903-3-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
2012-11-13 4:37 ` Mark Zhang
2012-11-13 7:45 ` Mark Zhang
[not found] ` <50A1FAB0.8040700-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 7:53 ` Thierry Reding
[not found] ` <1352467202-27903-1-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
2012-11-09 17:34 ` [PATCH 0/2] Device tree updates for " Stephen Warren
[not found] ` <509D3EB1.8040703-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-09 18:44 ` Thierry Reding
[not found] ` <20121109184409.GB7663-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-09 21:10 ` Stephen Warren
[not found] ` <509D7145.9000203-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-15 8:21 ` Prashant Gaikwad
2012-11-15 8:50 ` Thierry Reding
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