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From: Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
	Peter De Schrijver
	<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	Alexandre Courbot
	<acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH RESEND] ARM: tegra114: correctly output clk_32k
Date: Fri, 31 May 2013 12:25:28 -0700	[thread overview]
Message-ID: <20130531192528.21525.46053@quantum> (raw)
In-Reply-To: <1369536991-6111-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Quoting Alexandre Courbot (2013-05-25 19:56:31)
> Tegra has a blink timer register that allows to modulate the
> clk_32k clock before outputting it. Since clk_32k is presented to the
> kernel as a fixed clock, make sure this register does not tamper with
> the clock frequency and that clk_32k is outputted as-is, similarly to
> what is done on t20 and t30.
> 
> Signed-off-by: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

Taken into clk-next.

Regards,
Mike

> ---
>  drivers/clk/tegra/clk-tegra114.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
> index d78e16e..dc76d67 100644
> --- a/drivers/clk/tegra/clk-tegra114.c
> +++ b/drivers/clk/tegra/clk-tegra114.c
> @@ -127,6 +127,7 @@
>  #define PMC_DPD_PADS_ORIDE_BLINK_ENB 20
>  #define PMC_CTRL 0
>  #define PMC_CTRL_BLINK_ENB 7
> +#define PMC_BLINK_TIMER 0x40
>  
>  #define OSC_CTRL                       0x50
>  #define OSC_CTRL_OSC_FREQ_SHIFT                28
> @@ -1625,6 +1626,8 @@ static void __init tegra114_pmc_clk_init(void __iomem *pmc_base)
>         clks[clk_out_3] = clk;
>  
>         /* blink */
> +       /* clear the blink timer register to directly output clk_32k */
> +       writel_relaxed(0, pmc_base + PMC_BLINK_TIMER);
>         clk = clk_register_gate(NULL, "blink_override", "clk_32k", 0,
>                                 pmc_base + PMC_DPD_PADS_ORIDE,
>                                 PMC_DPD_PADS_ORIDE_BLINK_ENB, 0, NULL);
> -- 
> 1.8.2.3

      parent reply	other threads:[~2013-05-31 19:25 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-26  2:56 [PATCH RESEND] ARM: tegra114: correctly output clk_32k Alexandre Courbot
2013-05-28 15:19 ` Stephen Warren
     [not found]   ` <51A4CAF9.4000305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-05-31 19:26     ` Mike Turquette
     [not found] ` <1369536991-6111-1-git-send-email-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-05-31 19:25   ` Mike Turquette [this message]

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