From: Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Prashant Gaikwad
<pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Aleksandr Frid <afrid-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH 3/3] clk: tegra: T114: add DFLL DVCO reset control
Date: Sat, 15 Jun 2013 21:22:56 -0700 [thread overview]
Message-ID: <20130616042256.7541.7096@quantum> (raw)
In-Reply-To: <alpine.DEB.2.02.1306110944130.22645-rwI8Ez+7Ko+d5PgPZx9QOdBPR1lH4CV8@public.gmane.org>
Quoting Paul Walmsley (2013-06-11 02:47:13)
> On Tue, 11 Jun 2013, Prashant Gaikwad wrote:
>
> > Why not implement these APIs in DFLL clock driver itself and pass RST address
> > register to driver?
>
> The DFLL DVCO reset registers are CAR registers, not DFLL registers.
> Functions that operate on registers in one IP block shouldn't be located
> in another IP block's driver.
Paul & Co.,
These patches appear fine to me but I did not see any Acks, nor could I
tell if a v2 was necessary based on the comments. Will there be another
version? If not an Acked-by or Reviewed-by would be cool.
Regards,
Mike
>
>
> - Paul
next prev parent reply other threads:[~2013-06-16 4:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-07 12:18 [PATCH 0/3] clk: tegra: T114: add DFLL prerequisites Paul Walmsley
[not found] ` <20130607121505.21868.72360.stgit-orwA252wQtA@public.gmane.org>
2013-06-07 12:18 ` [PATCH 1/3] clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL Paul Walmsley
2013-06-07 12:19 ` [PATCH 2/3] clk: tegra: T114: add DFLL source clocks Paul Walmsley
[not found] ` <20130607121858.21868.73882.stgit-orwA252wQtA@public.gmane.org>
2013-06-07 16:53 ` Stephen Warren
2013-06-07 12:19 ` [PATCH 3/3] clk: tegra: T114: add DFLL DVCO reset control Paul Walmsley
[not found] ` <20130607121901.21868.65416.stgit-orwA252wQtA@public.gmane.org>
2013-06-07 16:57 ` Stephen Warren
[not found] ` <51B21105.1080301-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-06-07 17:06 ` Paul Walmsley
[not found] ` <alpine.DEB.2.02.1306071703050.7753-rwI8Ez+7Ko+d5PgPZx9QOdBPR1lH4CV8@public.gmane.org>
2013-06-11 7:31 ` Prashant Gaikwad
2013-06-11 9:47 ` Paul Walmsley
[not found] ` <alpine.DEB.2.02.1306110944130.22645-rwI8Ez+7Ko+d5PgPZx9QOdBPR1lH4CV8@public.gmane.org>
2013-06-16 4:22 ` Mike Turquette [this message]
2013-06-17 20:22 ` Paul Walmsley
[not found] ` <alpine.DEB.2.02.1306172019270.17176-rwI8Ez+7Ko+d5PgPZx9QOdBPR1lH4CV8@public.gmane.org>
2013-06-18 18:28 ` Mike Turquette
2013-06-18 18:33 ` Paul Walmsley
2013-06-19 8:45 ` Peter De Schrijver
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