Re: [PATCH 4/4] ARM: tegra: correct Colibri T20 regulator settings

[Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

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On Sun, Jul 21, 2013 at 11:28:52PM +0200, Lucas Stach wrote:
> Core and CPU voltage settings were a bit on the safe side. The actually
> used chips on the Colibri allow for lower voltages and work just fine
> this way.
> 
> SM2 is not a the parent of LDO regs, but actually the DDR regulator. The
> Colibri uses a different version of the TPS with other voltage mapping
> tables for SM2, currently we cheat by setting a fake 3,2V which results
> in 1,8V physical.
> 
> Signed-off-by: Lucas Stach <dev-8ppwABl0HbeELgA04lAiVw@public.gmane.org>
> ---
> The issue with the used version of the PMIC having a different voltage
> mapping for SM2 should be resolved properly. As this needs some bigger
> adjustments at the regulator driver this quick fix is just aimed at
> stopping slight overvolting of the ram with 3.11 kernels. A proper fix
> should land in time for 3.12.

This wouldn't happen to be the TPS658640? I remember a similar problem
with a special version of Tamonten that had this version of the PMU
which supposedly is pin and register-compatible. Well, it is register
compatible alright, and the pins are the same as well, but the voltage
tables are slightly different.

I did attempt to work the changes into the tps6586x driver at some point
but there were a few things that made it much more difficult than I had
imagined.

Thierry

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