From mboxrd@z Thu Jan  1 00:00:00 1970
From: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH 3/3] clk: tegra: Properly setup PWM clock on Tegra30
Date: Fri, 1 Nov 2013 18:47:09 +0200
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> > 
> > And also not validated. Also by policy PLLC2 and PLLC3 are used for scaling
> > IP blocks. So I don't think it makes sense to use them for PWM?
> 
> But the policy is already defined in the clock initialization tables, so
> we could still setup the clock to exhibit all the possible HW choices
> and simply not use those excluded "by policy".
> 

That's only the 'default'. Nothing prevents a driver from doing a clk_set_parent().

Cheers,

Peter.