* [PATCH] PCI: Disable Gen2 for Tegra20 and Tegra30
@ 2013-11-18 22:55 Eric Brower
[not found] ` <1384815306-3149-1-git-send-email-ebrower-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
0 siblings, 1 reply; 3+ messages in thread
From: Eric Brower @ 2013-11-18 22:55 UTC (permalink / raw)
To: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w
Cc: bhelgaas-hpIqsD4AKlfQT0dZR+AlfA, linux-pci-u79uwXL29TY76Z2rM5mHXA,
swarren-3lzwWm7+Weoh9ZMKESR00Q,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, Eric Brower
Tegra20 and Tegra30 do not support gen2 PCIe, so correct the
register setting to disable it.
Signed-off-by: Eric Brower <ebrower-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
drivers/pci/host/pci-tegra.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 0afbbbc..b8ba2f7 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -805,7 +805,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
afi_writel(pcie, value, AFI_PCIE_CONFIG);
value = afi_readl(pcie, AFI_FUSE);
- value &= ~AFI_FUSE_PCIE_T0_GEN2_DIS;
+ value |= AFI_FUSE_PCIE_T0_GEN2_DIS;
afi_writel(pcie, value, AFI_FUSE);
/* initialize internal PHY, enable up to 16 PCIE lanes */
--
1.8.1.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] PCI: Disable Gen2 for Tegra20 and Tegra30
[not found] ` <1384815306-3149-1-git-send-email-ebrower-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
@ 2013-11-29 15:00 ` Thierry Reding
2013-12-07 22:40 ` Bjorn Helgaas
1 sibling, 0 replies; 3+ messages in thread
From: Thierry Reding @ 2013-11-29 15:00 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Eric Brower, linux-pci-u79uwXL29TY76Z2rM5mHXA,
swarren-3lzwWm7+Weoh9ZMKESR00Q,
linux-tegra-u79uwXL29TY76Z2rM5mHXA
[-- Attachment #1: Type: text/plain, Size: 1186 bytes --]
On Mon, Nov 18, 2013 at 02:55:06PM -0800, Eric Brower wrote:
> Tegra20 and Tegra30 do not support gen2 PCIe, so correct the
> register setting to disable it.
>
> Signed-off-by: Eric Brower <ebrower-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> drivers/pci/host/pci-tegra.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
> index 0afbbbc..b8ba2f7 100644
> --- a/drivers/pci/host/pci-tegra.c
> +++ b/drivers/pci/host/pci-tegra.c
> @@ -805,7 +805,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
> afi_writel(pcie, value, AFI_PCIE_CONFIG);
>
> value = afi_readl(pcie, AFI_FUSE);
> - value &= ~AFI_FUSE_PCIE_T0_GEN2_DIS;
> + value |= AFI_FUSE_PCIE_T0_GEN2_DIS;
> afi_writel(pcie, value, AFI_FUSE);
>
> /* initialize internal PHY, enable up to 16 PCIE lanes */
Bjorn: can you pick this up directly or would you rather have me prepare
a branch? It's the only one for Tegra so far, so a branch wouldn't be
all that useful. In case you want to pick it up directly:
Acked-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] PCI: Disable Gen2 for Tegra20 and Tegra30
[not found] ` <1384815306-3149-1-git-send-email-ebrower-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-29 15:00 ` Thierry Reding
@ 2013-12-07 22:40 ` Bjorn Helgaas
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Helgaas @ 2013-12-07 22:40 UTC (permalink / raw)
To: Eric Brower
Cc: thierry.reding-Re5JQEeQqe8AvxtiuMwx3w,
linux-pci-u79uwXL29TY76Z2rM5mHXA, swarren-3lzwWm7+Weoh9ZMKESR00Q,
linux-tegra-u79uwXL29TY76Z2rM5mHXA
On Mon, Nov 18, 2013 at 02:55:06PM -0800, Eric Brower wrote:
> Tegra20 and Tegra30 do not support gen2 PCIe, so correct the
> register setting to disable it.
>
> Signed-off-by: Eric Brower <ebrower-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Applied with Thierry's ack to pci/host-tegra for v3.14, thanks!
Bjorn
> ---
> drivers/pci/host/pci-tegra.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
> index 0afbbbc..b8ba2f7 100644
> --- a/drivers/pci/host/pci-tegra.c
> +++ b/drivers/pci/host/pci-tegra.c
> @@ -805,7 +805,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
> afi_writel(pcie, value, AFI_PCIE_CONFIG);
>
> value = afi_readl(pcie, AFI_FUSE);
> - value &= ~AFI_FUSE_PCIE_T0_GEN2_DIS;
> + value |= AFI_FUSE_PCIE_T0_GEN2_DIS;
> afi_writel(pcie, value, AFI_FUSE);
>
> /* initialize internal PHY, enable up to 16 PCIE lanes */
> --
> 1.8.1.5
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2013-11-18 22:55 [PATCH] PCI: Disable Gen2 for Tegra20 and Tegra30 Eric Brower
[not found] ` <1384815306-3149-1-git-send-email-ebrower-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-11-29 15:00 ` Thierry Reding
2013-12-07 22:40 ` Bjorn Helgaas
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