Re: [PATCHv8 21/21] ARM: dt: tegra124: add sdhci iommus bindings

[Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

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On Fri, May 30, 2014 at 07:44:06PM +0300, Hiroshi Doyu wrote:
> 
> Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> writes:
> 
> > On 05/30/2014 05:20 AM, Hiroshi Doyu wrote:
> >> Add sdhci iommus bindings.
> >
> > This isn't adding bindings, it's adding DT properties. A binding is the
> > documentation of the schema, not the actual data in the DT.
> >
> >> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
> >> index 5b339ca8a1ab..011831ffd390 100644
> >> --- a/arch/arm/boot/dts/tegra124.dtsi
> >> +++ b/arch/arm/boot/dts/tegra124.dtsi
> >> @@ -472,6 +472,7 @@
> >>  		resets = <&tegra_car 14>;
> >>  		reset-names = "sdhci";
> >>  		status = "disabled";
> >> +		iommus=<&smmu TEGRA_SWGROUP_CELLS(SDMMC1A)>;
> >
> > Is the "iommus" property documented anywhere? I suspect not, since
> > there's an active ongoing discussion about how IOMMU bindings should be
> > structured. I suspect this series needs to wait until that discussion
> > completes, and the "iommus" property is documented somewhere.
> 
> Yes, I'm catching up that thread now. That's why I drop document part.
> 
> If Thierry's patch(v2 or v3) is accpeted, this patch won't need any
> further doc since it will use the IOMMU standard bindings("iommus = ").

The binding for the Tegra SMMU would still need to document what the
specifier means. Also I think we should change the current meaning of a
two-cell bitmask to the more explicit one cell per SWGROUP binding, that
is something like this:

	iommus = <&smmu TEGRA_SWGROUP_SDMMC1A>;

Thierry

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