From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>,
Mikko Perttunen <mperttunen@nvidia.com>,
"tj@kernel.org" <tj@kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-ide@vger.kernel.org" <linux-ide@vger.kernel.org>
Subject: Re: [PATCH 6/9] ARM: tegra: Export tegra_powergate_power_on
Date: Wed, 9 Jul 2014 11:33:11 +0300 [thread overview]
Message-ID: <20140709083311.GE23218@tbergstrom-lnx.Nvidia.com> (raw)
In-Reply-To: <20140709063130.GA3170@ulmo>
On Wed, Jul 09, 2014 at 08:31:32AM +0200, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Tue, Jul 08, 2014 at 05:11:35PM +0300, Peter De Schrijver wrote:
> > > >
> > > > Yes, but the problem is that you also need clocks and reset of other modules
> > > > in the same domain to safely control the domain's status. Eg: the ISPs, VI and
> > > > CSI share a domain. VI and CSI are useable without ISP and the ISP lacks
> > > > public documentation. So it's not unlikely a VI and CSI driver will upstreamed
> > > > someday which means we would need to control the domain and therefore would
> > > > need to tell that driver about the ISPs clocks and resets even though the
> > > > driver doesn't know anything about the ISP hw otherwise.
> > >
> > > Can't we make powergates reference counted so that they don't get
> > > disabled as long as there are any users? Looking for example at the
> >
> > We could, but then why not switch to the powerdomain code and make powering
> > off a domain a NOP until we sorted out the context save/restore or fixed
> > the framework to allow for suspend without turning off the domains?
>
> Well, one of the reasons why I'm not sure it's worth the effort at this
> point is that we can't get rid of the tegra_powergate_*() API anyway
> because of backwards compatibility. So we're going to add code (without
> getting rid of old code) merely to support some generic framework. That
> doesn't sound very useful to me.
>
We can also convert the existing users to genpd. Today there are only 2 users
(gpu/drm/tegra/gr3d.c and pci/host/pci-tegra.c), so that doesn't seem to be
an impossible task.
> > > display controller driver, modules don't seem to care overly much about
> > > the powergate's state except that it needs to be turned on before they
> > > touch some of the registers.
> > >
> > > From a bit of experimentation it also seems like the sequence encoded
> > > within tegra_powergate_sequence_power_up() isn't at all necessary. I
> > > couldn't find an authoritative reference for that either, so I'm tempted
> > > to conclude that it was simply cargo-culted from the dark-ages.
> > >
> > > So I'm thinking that if we ever move to use power domains for this, we
> > > may be able to just drop any extra handling (well, we'd need to keep it
> > > for backwards-compatibility... *sigh*) and let drivers handle the clock
> > > and reset resources.
> > >
> > > On the other hand, given that we already need to keep the existing code
> > > for backwards-compatibility, I'm not sure there's a real advantage in
> > > turning them into power domains, since we'd be adding extra code without
> > > an clear gains (especially since it seems like we'd need even more code
> > > to properly handle suspend/resume in drivers that need powergates).
> > >
> >
> > Unless we fix the framework to require context save/restore for suspend.
> > There is a good reason to do that. context save/restore requires energy
> > as well, so it's not a given that turning off domains in system suspend
> > will save power.
>
> I'm not sure I follow. "require context save/restore for suspend" is
> what many drivers currently don't support, hence we can't use the
> generic PM domains. Perhaps what you're saying is that the PM domain
> core code should be enhanced so that domains can be marked so that they
> stay on during a suspend/resume cycle.
>
Exactly.
Cheers,
Peter.
next prev parent reply other threads:[~2014-07-09 8:33 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-04 11:32 [PATCH 0/9] Serial ATA support for NVIDIA Tegra124 Mikko Perttunen
2014-06-04 11:32 ` [PATCH 1/9] of: Add NVIDIA Tegra SATA controller binding Mikko Perttunen
2014-06-16 21:55 ` Stephen Warren
2014-06-04 11:32 ` [PATCH 2/9] ARM: tegra: Add SATA controller to Tegra124 device tree Mikko Perttunen
2014-06-04 11:32 ` [PATCH 3/9] ARM: tegra: Add SATA and SATA power to Jetson TK1 " Mikko Perttunen
[not found] ` <1401881559-18469-4-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-16 21:58 ` Stephen Warren
2014-06-04 11:32 ` [PATCH 4/9] clk: tegra: Enable hardware control of SATA PLL Mikko Perttunen
2014-06-16 21:49 ` Stephen Warren
2014-06-17 9:59 ` Peter De Schrijver
2014-06-04 11:32 ` [PATCH 5/9] clk: tegra: Add SATA clocks to Tegra124 initialization table Mikko Perttunen
2014-06-04 11:32 ` [PATCH 6/9] ARM: tegra: Export tegra_powergate_power_on Mikko Perttunen
[not found] ` <1401881559-18469-7-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-16 22:01 ` Stephen Warren
2014-06-17 12:13 ` Thierry Reding
2014-06-17 12:28 ` Mikko Perttunen
2014-06-17 14:01 ` Peter De Schrijver
2014-06-17 21:51 ` Thierry Reding
2014-06-18 12:18 ` Peter De Schrijver
2014-06-18 15:37 ` Stephen Warren
2014-06-19 8:02 ` Peter De Schrijver
2014-06-19 8:36 ` Peter De Schrijver
2014-06-19 16:01 ` Stephen Warren
2014-06-23 10:14 ` Peter De Schrijver
2014-07-08 13:05 ` Thierry Reding
2014-07-08 14:11 ` Peter De Schrijver
2014-07-09 6:31 ` Thierry Reding
2014-07-09 8:33 ` Peter De Schrijver [this message]
[not found] ` <20140709083311.GE23218-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2014-07-09 10:25 ` Thierry Reding
2014-07-09 10:31 ` Lucas Stach
2014-07-09 11:20 ` Peter De Schrijver
2014-07-09 11:08 ` Peter De Schrijver
[not found] ` <20140709110816.GF23218-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2014-07-09 12:04 ` Thierry Reding
2014-07-09 12:43 ` Peter De Schrijver
2014-07-09 12:56 ` Thierry Reding
2014-07-09 13:20 ` Peter De Schrijver
2014-07-09 14:42 ` Thierry Reding
2014-07-09 16:09 ` Peter De Schrijver
2014-06-04 11:32 ` [PATCH 7/9] ahci: Increase AHCI_MAX_CLKS to 4 Mikko Perttunen
[not found] ` <1401881559-18469-8-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-16 22:04 ` Stephen Warren
2014-06-04 11:32 ` [PATCH 8/9] ata: Add support for the Tegra124 SATA controller Mikko Perttunen
[not found] ` <1401881559-18469-9-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-05 12:18 ` Rob Herring
2014-06-05 12:59 ` Mikko Perttunen
2014-06-16 22:14 ` Stephen Warren
2014-06-17 12:14 ` Bartlomiej Zolnierkiewicz
2014-06-17 16:10 ` Stephen Warren
2014-06-17 16:13 ` Tejun Heo
[not found] ` <20140617161320.GG31819-Gd/HAXX7CRxy/B6EtB590w@public.gmane.org>
2014-06-17 16:14 ` Tejun Heo
2014-06-17 16:23 ` Stephen Warren
2014-06-17 16:32 ` Tejun Heo
2014-06-17 17:04 ` Bartlomiej Zolnierkiewicz
2014-06-17 17:36 ` Mikko Perttunen
[not found] ` <53A07CA4.7080206-/1wQRMveznE@public.gmane.org>
2014-06-17 17:37 ` Stephen Warren
2014-06-04 11:32 ` [PATCH 9/9] ARM: tegra: Add options for Tegra AHCI support to tegra_defconfig Mikko Perttunen
[not found] ` <1401881559-18469-1-git-send-email-mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-05 17:29 ` [PATCH 0/9] Serial ATA support for NVIDIA Tegra124 Stephen Warren
[not found] ` <5390A8F9.2090408-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-06-06 6:27 ` Mikko Perttunen
2014-06-06 7:11 ` Thierry Reding
2014-06-06 7:18 ` Mikko Perttunen
[not found] ` <53915F3B.6050806-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-09 18:33 ` Stephen Warren
[not found] ` <5395FE0E.80105-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2014-06-09 18:49 ` Mikko Perttunen
[not found] ` <539601B4.1010707-/1wQRMveznE@public.gmane.org>
2014-07-08 13:08 ` Thierry Reding
2014-07-08 13:34 ` Mikko Perttunen
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