From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Sean Paul <seanpaul-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
Cc: "Mark Rutland" <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"Will Deacon" <will.deacon-5wv7dgnIgG8@public.gmane.org>,
"Paul Walmsley"
<pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"Pawel Moll" <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
"Ian Campbell"
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
"Marc Zyngier" <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
"Dave Martin" <Dave.Martin-5wv7dgnIgG8@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"Arnd Bergmann" <arnd-r2nGTMty4D4@public.gmane.org>,
"Stephen Warren"
<swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
"Grant Grundler"
<grundler-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
"Allen Martin" <amartin-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"Cho KyongHo"
<pullip.cho-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
"Linux ARM Kernel"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"Stéphane Marchesin"
<marcheu-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
"Linux Kernel Mailing List"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"Linux IOMMU"
<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
"Kumar Gala" <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
"Rhyland Klein" <rklein@nvidia>
Subject: Re: [RFC 09/10] drm/tegra: Add IOMMU support
Date: Wed, 5 Nov 2014 11:26:59 +0100 [thread overview]
Message-ID: <20141105102657.GB12458@ulmo.nvidia.com> (raw)
In-Reply-To: <CAOw6vbJy6oy7cibH4f332UM=kS56KUMcnYdUTG0pEYXyQkFDoQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
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On Tue, Sep 30, 2014 at 02:48:35PM -0400, Sean Paul wrote:
> On Thu, Jun 26, 2014 at 4:49 PM, Thierry Reding
> <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> > From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> >
> > When an IOMMU device is available on the platform bus, allocate an IOMMU
> > domain and attach the display controllers to it. The display controllers
> > can then scan out non-contiguous buffers by mapping them through the
> > IOMMU.
> >
>
> Hi Thierry,
> A few comments from Stéphane and myself that came up while we were
> reviewing this for our tree.
I just realized that I hadn't integrated these comments completely yet,
but I've done so now in my local tree. I'm running a couple of tests to
verify that it's all handled correctly.
> > Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > ---
> > drivers/gpu/drm/tegra/dc.c | 21 ++++
> > drivers/gpu/drm/tegra/drm.c | 17 ++++
> > drivers/gpu/drm/tegra/drm.h | 3 +
> > drivers/gpu/drm/tegra/fb.c | 16 ++-
> > drivers/gpu/drm/tegra/gem.c | 236 +++++++++++++++++++++++++++++++++++++++-----
> > drivers/gpu/drm/tegra/gem.h | 4 +
> > 6 files changed, 273 insertions(+), 24 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
> > index afcca04f5367..0f7452d04811 100644
> > --- a/drivers/gpu/drm/tegra/dc.c
> > +++ b/drivers/gpu/drm/tegra/dc.c
> > @@ -9,6 +9,7 @@
> >
> > #include <linux/clk.h>
> > #include <linux/debugfs.h>
> > +#include <linux/iommu.h>
> > #include <linux/reset.h>
> >
> > #include "dc.h"
> > @@ -1283,8 +1284,18 @@ static int tegra_dc_init(struct host1x_client *client)
> > {
> > struct drm_device *drm = dev_get_drvdata(client->parent);
> > struct tegra_dc *dc = host1x_client_to_dc(client);
> > + struct tegra_drm *tegra = drm->dev_private;
> > int err;
> >
> > + if (tegra->domain) {
> > + err = iommu_attach_device(tegra->domain, dc->dev);
> > + if (err < 0) {
> > + dev_err(dc->dev, "failed to attach to IOMMU: %d\n",
> > + err);
> > + return err;
> > + }
>
> [from Stéphane]
>
> shouldn't we call detach in the error paths below?
This was mostly rewritten for universal plane support, but I've made
sure that the DC properly detaches from the IOMMU in case of failure
during the code below.
> > diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
[...]
> > @@ -8,6 +8,7 @@
> > */
> >
> > #include <linux/host1x.h>
> > +#include <linux/iommu.h>
> >
> > #include "drm.h"
> > #include "gem.h"
> > @@ -33,6 +34,16 @@ static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
> > if (!tegra)
> > return -ENOMEM;
> >
> > + if (iommu_present(&platform_bus_type)) {
> > + tegra->domain = iommu_domain_alloc(&platform_bus_type);
> > + if (IS_ERR(tegra->domain)) {
> > + kfree(tegra);
> > + return PTR_ERR(tegra->domain);
> > + }
> > +
> > + drm_mm_init(&tegra->mm, 0, SZ_2G);
>
>
> [from Stéphane]:
>
> none of these are freed in the error path below (iommu_domain_free and
> drm_mm_takedown)
>
> also |tegra| isn't freed either?
None of the resources were actually being cleaned up, but I think I have
it all handled properly now.
> > @@ -108,22 +240,33 @@ struct tegra_bo *tegra_bo_create(struct drm_device *drm, unsigned int size,
> > host1x_bo_init(&bo->base, &tegra_bo_ops);
> > size = round_up(size, PAGE_SIZE);
> >
> > - bo->vaddr = dma_alloc_writecombine(drm->dev, size, &bo->paddr,
> > - GFP_KERNEL | __GFP_NOWARN);
> > - if (!bo->vaddr) {
> > - dev_err(drm->dev, "failed to allocate buffer with size %u\n",
> > - size);
> > - err = -ENOMEM;
> > - goto err_dma;
> > - }
> > -
> > err = drm_gem_object_init(drm, &bo->gem, size);
> > if (err)
> > - goto err_init;
> > + goto free;
> >
> > err = drm_gem_create_mmap_offset(&bo->gem);
>
> We need to call drm_gem_free_mmap_offset if one of the calls below
> fails, otherwise we'll try to free the mmap_offset on an already
> destroyed bo.
drm_gem_object_release() (below) already calls drm_gem_free_mmap_offset()
for us implicitly.
Thierry
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next prev parent reply other threads:[~2014-11-05 10:26 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-26 20:49 [RFC 00/10] Add NVIDIA Tegra124 IOMMU support Thierry Reding
[not found] ` <1403815790-8548-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-26 20:49 ` [RFC 01/10] iommu: Add IOMMU device registry Thierry Reding
[not found] ` <1403815790-8548-2-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-27 6:58 ` Thierry Reding
2014-07-03 10:37 ` Varun Sethi
2014-07-04 11:05 ` Joerg Roedel
[not found] ` <20140704110529.GF13434-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2014-07-04 13:47 ` Thierry Reding
2014-07-04 13:49 ` Will Deacon
[not found] ` <20140704134928.GA25714-5wv7dgnIgG8@public.gmane.org>
2014-07-06 18:17 ` Arnd Bergmann
[not found] ` <201407062017.23049.arnd-r2nGTMty4D4@public.gmane.org>
2014-07-07 11:42 ` Thierry Reding
2014-06-26 20:49 ` [PATCH v3 02/10] devicetree: Add generic IOMMU device tree bindings Thierry Reding
[not found] ` <1403815790-8548-3-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-27 13:55 ` Will Deacon
2014-06-30 22:24 ` Stephen Warren
2014-07-04 6:42 ` Varun Sethi
[not found] ` <9ffe3c3871ef4b60a955259bfa0bed6c-AZ66ij2kwaacCcN9WK45f+O6mTEJWrR4XA4E9RH9d+qIuWR1G4zioA@public.gmane.org>
2014-07-04 9:05 ` Arnd Bergmann
2014-06-26 20:49 ` [RFC 03/10] of: Add NVIDIA Tegra124 memory controller binding Thierry Reding
2014-06-26 20:49 ` [RFC 04/10] memory: Add Tegra124 memory controller support Thierry Reding
[not found] ` <1403815790-8548-5-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-27 7:41 ` Joseph Lo
[not found] ` <53AD2020.1050802-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-27 8:17 ` Thierry Reding
2014-06-27 8:24 ` Hiroshi Doyu
2014-06-27 9:46 ` Hiroshi DOyu
[not found] ` <20140627124638.7ec150cca163c89727b8953f-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-27 11:08 ` Thierry Reding
2014-06-27 21:33 ` Stephen Warren
2014-06-27 11:07 ` Arnd Bergmann
2014-06-27 11:15 ` Thierry Reding
2014-06-27 21:37 ` Stephen Warren
2014-06-30 22:43 ` Stephen Warren
2014-07-01 12:14 ` Hiroshi Doyu
2014-06-27 13:29 ` Mikko Perttunen
2014-06-26 20:49 ` [RFC 05/10] ARM: tegra: Add memory controller on Tegra124 Thierry Reding
2014-06-26 20:49 ` [RFC 06/10] ARM: tegra: tegra124: Enable IOMMU for display controllers Thierry Reding
2014-06-26 20:49 ` [RFC 07/10] ARM: tegra: tegra124: Enable IOMMU for SDMMC controllers Thierry Reding
2014-06-26 20:49 ` [RFC 08/10] ARM: tegra: Select ARM_DMA_USE_IOMMU Thierry Reding
2014-06-26 20:49 ` [RFC 09/10] drm/tegra: Add IOMMU support Thierry Reding
[not found] ` <1403815790-8548-10-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-27 9:46 ` Hiroshi DOyu
[not found] ` <20140627124614.050be2e406a4b9a02d9fe97c-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-27 10:54 ` Arnd Bergmann
2014-06-27 11:03 ` Hiroshi Doyu
2014-06-27 10:58 ` Thierry Reding
2014-09-30 18:48 ` Sean Paul
[not found] ` <CAOw6vbJy6oy7cibH4f332UM=kS56KUMcnYdUTG0pEYXyQkFDoQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-10-01 15:54 ` Sean Paul
[not found] ` <CAOw6vbLFLrqWYB-4N50G7oucgMD+xd+QtdcMSzX4z7xRiU-vPQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-10-02 8:39 ` Thierry Reding
2014-11-05 9:50 ` Thierry Reding
2014-11-05 10:26 ` Thierry Reding [this message]
2014-06-26 20:49 ` [RFC 10/10] mmc: sdhci-tegra: " Thierry Reding
[not found] ` <1403815790-8548-11-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-06-27 9:46 ` Hiroshi DOyu
[not found] ` <20140627124602.53d046dae5d7e269815e56a0-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-06-27 11:01 ` Thierry Reding
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