[PATCH 1/3] soc/tegra: fuse: Add spare bit offset for Tegra114

[PATCH 1/3] soc/tegra: fuse: Add spare bit offset for Tegra114

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The offset of the first spare bit register on Tegra114 is 0x280.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/soc/tegra/fuse/fuse-tegra30.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
index 5a6c533417fc..a55664fda81e 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra30.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
@@ -117,6 +117,7 @@ const struct tegra_fuse_soc tegra30_fuse_soc = {
 static const struct tegra_fuse_info tegra114_fuse_info = {
 	.read = tegra30_fuse_read,
 	.size = 0x2a0,
+	.spare = 0x280,
 };
 
 const struct tegra_fuse_soc tegra114_fuse_soc = {
-- 
2.3.5

[PATCH 2/3] soc/tegra: fuse: Add spare bit offset for Tegra124

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The offset of the first spare bit register on Tegra124 is 0x300.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/soc/tegra/fuse/fuse-tegra30.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
index a55664fda81e..ff409b4a0e36 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra30.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
@@ -131,6 +131,7 @@ const struct tegra_fuse_soc tegra114_fuse_soc = {
 static const struct tegra_fuse_info tegra124_fuse_info = {
 	.read = tegra30_fuse_read,
 	.size = 0x300,
+	.spare = 0x300,
 };
 
 const struct tegra_fuse_soc tegra124_fuse_soc = {
-- 
2.3.5

[PATCH 3/3] soc/tegra: fuse: Add spare bit offset for Tegra210

[Thierry Reding]

From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

The offset of the first spare bit register on Tegra210 is 0x380.

Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
 drivers/soc/tegra/fuse/fuse-tegra30.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
index ff409b4a0e36..74983d474d5c 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra30.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
@@ -145,6 +145,7 @@ const struct tegra_fuse_soc tegra124_fuse_soc = {
 static const struct tegra_fuse_info tegra210_fuse_info = {
 	.read = tegra30_fuse_read,
 	.size = 0x300,
+	.spare = 0x380,
 };
 
 const struct tegra_fuse_soc tegra210_fuse_soc = {
-- 
2.3.5

Re: [PATCH 1/3] soc/tegra: fuse: Add spare bit offset for Tegra114

[Thierry Reding]

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On Mon, May 04, 2015 at 04:48:41PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> 
> The offset of the first spare bit register on Tegra114 is 0x280.
> 
> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
>  drivers/soc/tegra/fuse/fuse-tegra30.c | 1 +
>  1 file changed, 1 insertion(+)

I just realized that all these offsets are offset by 0x100 because they
use the generic fuse access operation. Will update the series to reflect
that.

Thierry

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