From: Thierry Reding <thierry.reding@gmail.com>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Arnd Bergmann <arnd@arndb.de>, Tomasz Nowicki <tn@semihalf.com>,
Liviu Dudau <liviu.dudau@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Vidya Sagar <vidyas@nvidia.com>,
linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: [PATCH v4 06/10] PCI: tegra: Implement PCA enable workaround
Date: Fri, 25 Nov 2016 11:57:14 +0100 [thread overview]
Message-ID: <20161125105718.3866-6-thierry.reding@gmail.com> (raw)
In-Reply-To: <20161125105718.3866-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
Tegra210's PCIe controller has a bug that requires the PCA (performance
counter) feature to be enabled. If this isn't done, accesses to device
configuration space will hang the chip for tens of seconds. Implement
the workaround.
Based on commit 514e19138af2 ("pci: tegra: implement PCA enable
workaround") from U-Boot by Stephen Warren <swarren@nvidia.com>.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
drivers/pci/host/pci-tegra.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index d5206fa53353..4bfaac6d3582 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -188,6 +188,9 @@
#define RP_VEND_XP 0x00000f00
#define RP_VEND_XP_DL_UP (1 << 30)
+#define RP_VEND_CTL2 0x00000fa8
+#define RP_VEND_CTL2_PCA_ENABLE (1 << 7)
+
#define RP_PRIV_MISC 0x00000fe0
#define RP_PRIV_MISC_PRSNT_MAP_EP_PRSNT (0xe << 0)
#define RP_PRIV_MISC_PRSNT_MAP_EP_ABSNT (0xf << 0)
@@ -252,6 +255,7 @@ struct tegra_pcie_soc {
bool has_intr_prsnt_sense;
bool has_cml_clk;
bool has_gen2;
+ bool force_pca_enable;
};
static inline struct tegra_msi *to_tegra_msi(struct msi_controller *chip)
@@ -556,6 +560,12 @@ static void tegra_pcie_port_enable(struct tegra_pcie_port *port)
afi_writel(port->pcie, value, ctrl);
tegra_pcie_port_reset(port);
+
+ if (soc->force_pca_enable) {
+ value = readl(port->base + RP_VEND_CTL2);
+ value |= RP_VEND_CTL2_PCA_ENABLE;
+ writel(value, port->base + RP_VEND_CTL2);
+ }
}
static void tegra_pcie_port_disable(struct tegra_pcie_port *port)
@@ -2046,6 +2056,7 @@ static const struct tegra_pcie_soc tegra20_pcie = {
.has_intr_prsnt_sense = false,
.has_cml_clk = false,
.has_gen2 = false,
+ .force_pca_enable = false,
};
static const struct tegra_pcie_soc tegra30_pcie = {
@@ -2060,6 +2071,7 @@ static const struct tegra_pcie_soc tegra30_pcie = {
.has_intr_prsnt_sense = true,
.has_cml_clk = true,
.has_gen2 = false,
+ .force_pca_enable = false,
};
static const struct tegra_pcie_soc tegra124_pcie = {
@@ -2073,6 +2085,7 @@ static const struct tegra_pcie_soc tegra124_pcie = {
.has_intr_prsnt_sense = true,
.has_cml_clk = true,
.has_gen2 = true,
+ .force_pca_enable = false,
};
static const struct of_device_id tegra_pcie_of_match[] = {
--
2.10.2
next prev parent reply other threads:[~2016-11-25 10:57 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-25 10:57 [PATCH v4 01/10] PCI: Add new method for registering PCI hosts Thierry Reding
2016-11-25 10:57 ` Thierry Reding [this message]
[not found] ` <20161125105718.3866-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-11-25 10:57 ` [PATCH v4 02/10] PCI: Allow driver-specific data in host bridge Thierry Reding
2016-11-25 10:57 ` [PATCH v4 03/10] PCI: Make host bridge interface publicly available Thierry Reding
2016-11-25 10:57 ` [PATCH v4 04/10] PCI: tegra: Use new pci_register_host_bridge() interface Thierry Reding
[not found] ` <20161125105718.3866-4-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-12-09 10:11 ` Tomasz Nowicki
2016-11-25 10:57 ` [PATCH v4 05/10] dt-bindings: pci: tegra: Add Tegra210 support Thierry Reding
2016-11-25 10:57 ` [PATCH v4 07/10] PCI: " Thierry Reding
2016-11-25 10:57 ` [PATCH v4 08/10] PCI: tegra: Enable the driver on 64-bit ARM Thierry Reding
2016-11-25 10:57 ` [PATCH v4 09/10] arm64: tegra: Add PCIe host bridge on Tegra210 Thierry Reding
2016-11-25 10:57 ` [PATCH v4 10/10] arm64: tegra: Enable PCIe on Jetson TX1 Thierry Reding
[not found] ` <20161125105718.3866-10-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2016-11-28 16:54 ` Mikko Perttunen
[not found] ` <613fbc8c-07d9-d63d-bfb0-7e713dcac4f1-/1wQRMveznE@public.gmane.org>
2016-11-29 6:25 ` Vidya Sagar
2016-11-30 17:48 ` Thierry Reding
[not found] ` <20161130174840.GB20246-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>
2016-11-30 18:06 ` Mikko Perttunen
[not found] ` <13197e02-a83a-c9d8-13fa-7b21f664a12c-/1wQRMveznE@public.gmane.org>
2016-11-30 18:14 ` Thierry Reding
[not found] ` <20161130181409.GA29576-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org>
2016-11-30 18:39 ` Vidya Sagar
[not found] ` <71d84d4b-b14d-2f32-c36c-35a79e62d8bf-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-11-30 19:38 ` Mikko Perttunen
[not found] ` <3e8b2b5b-d779-4b3e-65f9-49ce0dcd796c-/1wQRMveznE@public.gmane.org>
2016-12-02 12:29 ` Mikko Perttunen
2016-12-07 17:58 ` [PATCH v4 01/10] PCI: Add new method for registering PCI hosts Bjorn Helgaas
2016-12-08 20:34 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161125105718.3866-6-thierry.reding@gmail.com \
--to=thierry.reding@gmail.com \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=liviu.dudau@arm.com \
--cc=lorenzo.pieralisi@arm.com \
--cc=tn@semihalf.com \
--cc=vidyas@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox