Re: [PATCH V3 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups

[Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]

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On Fri, Apr 07, 2017 at 03:03:58PM +0530, Laxman Dewangan wrote:
> This patch series have following fixes:
> - Add more precession in PWM period register value calculation
>   for lower pwm frequency.
> - Add support to configure PWM pins in different state in the
>   suspend/resume.
> 
> Changes from v1:
> - Use standard pinctrl names for sleep and active state.
> - Use API pinctrl_pm_select_*()
> 
> Changes from V2:
> - Type fixes, rephrases commit message and use pinctrl_pm_state* return
>   value.
> 
> Laxman Dewangan (4):
>   pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local
>     implementation
>   pwm: tegra: Increase precision in pwm rate calculation
>   pwm: tegra: Add DT binding details to configure pin in suspends/resume
>   pwm: tegra: Add support to configure pin state in suspends/resume
> 
>  .../devicetree/bindings/pwm/nvidia,tegra20-pwm.txt | 43 ++++++++++++
>  drivers/pwm/pwm-tegra.c                            | 77 ++++++++++++++++++++--
>  2 files changed, 116 insertions(+), 4 deletions(-)

All four patches applied to for-4.12/drivers, thanks.

I've slightly modified the commit messages of some patches for "pwm" ->
"PWM".

Thierry

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