From mboxrd@z Thu Jan  1 00:00:00 1970
From: Thierry Reding <thierry.reding@gmail.com>
Subject: Re: [PATCH V2] pwm: tegra: Set maximum pwm clock source per SoC
 tapeout
Date: Tue, 13 Jun 2017 14:32:42 +0200
Message-ID: <20170613123242.GA16758@ulmo.fritz.box>
References: <1493733937-15822-1-git-send-email-ldewangan@nvidia.com>
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To: Laxman Dewangan <ldewangan@nvidia.com>
Cc: jonathanh@nvidia.com, linux-pwm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
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On Tue, May 02, 2017 at 07:35:37PM +0530, Laxman Dewangan wrote:
> The PWM hardware IP is taped-out with different maximum frequency
> on different SoCs.
>=20
> From HW team:
> 	Before Tegra186, it is 38.4MHz.
> 	In Tegra186, it is 102MHz.
>=20
> Add support to limit the clock source frequency to the maximum IP
> supported frequency. Provide these values via SoC chipdata.
>=20
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
>=20
> ---
> Changes from V1:
> - Set the 48MHz maximum frequency for Tegra210 and earlier.
> - Set the maximum frequency unconditionally as per V1 review comment.
> ---
>  drivers/pwm/pwm-tegra.c | 18 +++++++++++++++++-
>  1 file changed, 17 insertions(+), 1 deletion(-)

Applied with a fixed up commit message and Jon's Acked-by.

Thanks,
Thierry

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