From: Stephen Boyd <sboyd@codeaurora.org>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 00/14] Fixes for Tegra clocks
Date: Wed, 23 Aug 2017 16:07:02 -0700 [thread overview]
Message-ID: <20170823230702.GK21656@codeaurora.org> (raw)
In-Reply-To: <20170817134803.GE6854@ulmo>
On 08/17, Thierry Reding wrote:
> On Thu, Jul 27, 2017 at 11:54:06AM -0700, Stephen Boyd wrote:
> > On 07/26, Peter De Schrijver wrote:
> > > On Tue, Jul 25, 2017 at 06:37:46PM -0700, Stephen Boyd wrote:
> > > > On 07/25, Peter De Schrijver wrote:
> > > > > A number of smaller fixes and simplifications for the Tegra clock
> > > > > implementation.
> > > >
> > > > Any of these need fixes tags so they can be backported to stable
> > > > trees? Also, everyone is on To: line, so not sure who is supposed
> > >
> > > I will have a look. For some of them a backport might be useful.
> > >
> > > > to pick these up. Me? That's fine if so.
> > > >
> > >
> > > That would be the easiest I think.
> > >
> >
> > Ok. I'll wait for you to reply with tags unless you didn't find
> > any?
>
> I'm not aware of any bugs that these would fix, so I think we can apply
> these as-is.
>
Ok. Applied them all to clk-next.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-08-23 23:07 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-25 10:34 [PATCH 00/14] Fixes for Tegra clocks Peter De Schrijver
2017-07-25 10:34 ` [PATCH 01/14] clk: tegra: fix SS control on PLL enable/disable Peter De Schrijver
2017-07-25 10:34 ` [PATCH 02/14] clk: tegra: Enable PLL_SS for Tegra210 Peter De Schrijver
2017-07-25 10:34 ` [PATCH 03/14] clk: tegra: disable SSC for PLL_D2 Peter De Schrijver
2017-07-25 10:34 ` [PATCH 04/14] clk: tegra210: remove non-existing VFIR clock Peter De Schrijver
2017-07-25 10:34 ` [PATCH 05/14] clk: tegra: Init cfg structure in _get_pll_mnp Peter De Schrijver
2017-07-25 10:34 ` [PATCH 06/14] clk: tegra: Fix T210 effective NDIV calculation Peter De Schrijver
[not found] ` <1500978856-5981-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2017-07-25 10:34 ` [PATCH 07/14] clk: tegra: Add TEGRA_PERIPH_ON_APB flag to I2C Peter De Schrijver
2017-07-26 1:37 ` [PATCH 00/14] Fixes for Tegra clocks Stephen Boyd
2017-07-26 8:27 ` Peter De Schrijver
[not found] ` <20170726082728.GD26726-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2017-07-27 18:54 ` Stephen Boyd
2017-08-17 13:48 ` Thierry Reding
2017-08-23 23:07 ` Stephen Boyd [this message]
2017-07-25 10:34 ` [PATCH 08/14] clk: tegra: change post IDDQ release delay to 5us Peter De Schrijver
2017-07-25 10:34 ` [PATCH 09/14] clk: tegra: don't warn for pll_d2 defaults unnecessarily Peter De Schrijver
2017-07-25 10:34 ` [PATCH 10/14] clk: tegra: Re-factor T210 PLLX registration Peter De Schrijver
2017-07-25 10:34 ` [PATCH 11/14] clk: tegra: Update T210 PLLSS (D2/DP) registration Peter De Schrijver
2017-07-25 10:34 ` [PATCH 12/14] clk: tegra: Fix T210 PLLRE registration Peter De Schrijver
2017-07-25 10:34 ` [PATCH 13/14] clk: tegra: Correct Tegra210 UTMIPLL poweron delay Peter De Schrijver
2017-07-25 10:34 ` [PATCH 14/14] clk: tegra: Fix Tegra210 PLLU initialization Peter De Schrijver
2017-08-17 13:31 ` [PATCH 00/14] Fixes for Tegra clocks Thierry Reding
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