Re: [PATCH 02/19] dt-bindings: clock: tegra124-dfll: add Tegra210 support

Jon Hunter
2018-12-07T13:50:37Z

On 04/12/2018 09:25, Joseph Lo wrote:
> Add Tegra210 support for DFLL clock.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Joseph Lo <josephl@nvidia.com>
> ---
> .../devicetree/bindings/clock/nvidia,tegra124-dfll.txt | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt
> index 8c97600d2bad..4bd44dd7ec1e 100644
> --- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt
> +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt
> @@ -10,7 +10,9 @@ control module that will automatically adjust the VDD_CPU voltage by
> communicating with an off-chip PMIC either via an I2C bus or via PWM signals.
>
> Required properties:
> -- compatible : should be "nvidia,tegra124-dfll"
> +- compatible : should be one of:
> + - "nvidia,tegra124-dfll": for Tegra124
> + - "nvidia,tegra210-dfll": for Tegra210
> - reg : Defines the following set of registers, in the order listed:
> - registers for the DFLL control logic.
> - registers for the I2C output logic.

Acked-by: Jon Hunter <jonathanh@nvidia.com>

Cheers
Jon

--
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