From: Thierry Reding <thierry.reding@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org, Dmitry Osipenko <digetx@gmail.com>,
dri-devel@lists.freedesktop.org,
Mikko Perttunen <mperttunen@nvidia.com>
Subject: [PATCH v2 08/13] drm/tegra: vic: Load firmware on demand
Date: Thu, 24 Jan 2019 19:02:49 +0100 [thread overview]
Message-ID: <20190124180254.20080-9-thierry.reding@gmail.com> (raw)
In-Reply-To: <20190124180254.20080-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
Loading the firmware requires an allocation of IOVA space to make sure
that the VIC's Falcon microcontroller can read the firmware if address
translation via the SMMU is enabled.
However, the allocation currently happens at a time where the geometry
of an IOMMU domain may not have been initialized yet. This happens for
example on Tegra186 and later where an ARM SMMU is used. Domains which
are created by the ARM SMMU driver postpone the geometry setup until a
device is attached to the domain. This is because IOMMU domains aren't
attached to a specific IOMMU instance at allocation time and hence the
input address space, which defines the geometry, is not known yet.
Work around this by postponing the firmware load until it is needed at
the time where a channel is opened to the VIC. At this time the shared
IOMMU domain's geometry has been properly initialized.
As a byproduct this allows the Tegra DRM to be created in the absence
of VIC firmware, since the VIC initialization no longer fails if the
firmware can't be found.
Based on an earlier patch by Dmitry Osipenko <digetx@gmail.com>.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- actually request firmware on demand
drivers/gpu/drm/tegra/vic.c | 53 +++++++++++++++++++++++++------------
1 file changed, 36 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/tegra/vic.c b/drivers/gpu/drm/tegra/vic.c
index d47983deb1cf..9cb10d1e923a 100644
--- a/drivers/gpu/drm/tegra/vic.c
+++ b/drivers/gpu/drm/tegra/vic.c
@@ -181,13 +181,6 @@ static int vic_init(struct host1x_client *client)
vic->domain = tegra->domain;
}
- if (!vic->falcon.data) {
- vic->falcon.data = tegra;
- err = falcon_load_firmware(&vic->falcon);
- if (err < 0)
- goto detach;
- }
-
vic->channel = host1x_channel_request(client->dev);
if (!vic->channel) {
err = -ENOMEM;
@@ -246,6 +239,30 @@ static const struct host1x_client_ops vic_client_ops = {
.exit = vic_exit,
};
+static int vic_load_firmware(struct vic *vic)
+{
+ int err;
+
+ if (vic->falcon.data)
+ return 0;
+
+ vic->falcon.data = vic->client->drm;
+
+ err = falcon_read_firmware(&vic->falcon, vic->config->firmware);
+ if (err < 0)
+ goto cleanup;
+
+ err = falcon_load_firmware(&vic->falcon);
+ if (err < 0)
+ goto cleanup;
+
+ return 0;
+
+cleanup:
+ vic->falcon.data = NULL;
+ return err;
+}
+
static int vic_open_channel(struct tegra_drm_client *client,
struct tegra_drm_context *context)
{
@@ -256,19 +273,25 @@ static int vic_open_channel(struct tegra_drm_client *client,
if (err < 0)
return err;
+ err = vic_load_firmware(vic);
+ if (err < 0)
+ goto rpm_put;
+
err = vic_boot(vic);
- if (err < 0) {
- pm_runtime_put(vic->dev);
- return err;
- }
+ if (err < 0)
+ goto rpm_put;
context->channel = host1x_channel_get(vic->channel);
if (!context->channel) {
- pm_runtime_put(vic->dev);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto rpm_put;
}
return 0;
+
+rpm_put:
+ pm_runtime_put(vic->dev);
+ return err;
}
static void vic_close_channel(struct tegra_drm_context *context)
@@ -372,10 +395,6 @@ static int vic_probe(struct platform_device *pdev)
if (err < 0)
return err;
- err = falcon_read_firmware(&vic->falcon, vic->config->firmware);
- if (err < 0)
- goto exit_falcon;
-
platform_set_drvdata(pdev, vic);
INIT_LIST_HEAD(&vic->client.base.list);
--
2.19.1
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next prev parent reply other threads:[~2019-01-24 18:02 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-24 18:02 [PATCH v2 00/13] drm/tegra: Fix IOVA space on Tegra186 and later Thierry Reding
2019-01-24 18:02 ` [PATCH v2 01/13] gpu: host1x: Set up stream ID table Thierry Reding
2019-01-24 18:02 ` [PATCH v2 02/13] gpu: host1x: Program the channel stream ID Thierry Reding
2019-01-24 18:02 ` [PATCH v2 03/13] gpu: host1x: Support 40-bit addressing Thierry Reding
2019-01-25 9:13 ` Mikko Perttunen
2019-01-25 9:20 ` Thierry Reding
2019-01-25 9:32 ` Mikko Perttunen
2019-01-25 9:34 ` Mikko Perttunen
2019-01-24 18:02 ` [PATCH v2 04/13] gpu: host1x: Use direct DMA with IOMMU API usage Thierry Reding
2019-01-28 14:30 ` Dmitry Osipenko
2019-01-24 18:02 ` [PATCH v2 05/13] gpu: host1x: Restrict IOVA space to DMA mask Thierry Reding
2019-01-24 18:02 ` [PATCH v2 06/13] gpu: host1x: Support 40-bit addressing on Tegra186 Thierry Reding
2019-01-24 18:02 ` [PATCH v2 07/13] drm/tegra: Store parent pointer in Tegra DRM clients Thierry Reding
2019-01-28 14:10 ` Dmitry Osipenko
2019-01-24 18:02 ` Thierry Reding [this message]
2019-01-28 14:12 ` [PATCH v2 08/13] drm/tegra: vic: Load firmware on demand Dmitry Osipenko
2019-01-24 18:02 ` [PATCH v2 09/13] drm/tegra: Setup shared IOMMU domain after initialization Thierry Reding
2019-01-24 18:02 ` [PATCH v2 10/13] drm/tegra: Restrict IOVA space to DMA mask Thierry Reding
2019-01-24 18:02 ` [PATCH v2 11/13] drm/tegra: vic: Do not clear driver data Thierry Reding
2019-01-24 18:02 ` [PATCH v2 12/13] drm/tegra: vic: Support stream ID register programming Thierry Reding
2019-01-24 18:02 ` [PATCH v2 13/13] arm64: tegra: Enable SMMU for VIC on Tegra186 Thierry Reding
2019-01-24 21:38 ` [PATCH v2 00/13] drm/tegra: Fix IOVA space on Tegra186 and later Dmitry Osipenko
2019-01-25 9:23 ` Thierry Reding
2019-01-25 13:14 ` Dmitry Osipenko
2019-01-24 21:53 ` Dmitry Osipenko
2019-01-25 8:57 ` Mikko Perttunen
2019-01-25 13:18 ` Dmitry Osipenko
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