From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dmitry Osipenko Subject: [PATCH v2 10/17] ARM: dts: tegra30: Add CPU clock Date: Fri, 25 Oct 2019 01:14:09 +0300 Message-ID: <20191024221416.14197-11-digetx@gmail.com> References: <20191024221416.14197-1-digetx@gmail.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20191024221416.14197-1-digetx@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Michael Turquette , Stephen Boyd , Peter Geis , Nicolas Chauvet , Marcel Ziswiler Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: linux-tegra@vger.kernel.org All "geared" CPU cores share the same CPU clock. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra30.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 8355264e2265..a4aaf8f73d18 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -1006,24 +1006,28 @@ device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; + clocks = <&tegra_car TEGRA30_CLK_CCLK_G>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; + clocks = <&tegra_car TEGRA30_CLK_CCLK_G>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <2>; + clocks = <&tegra_car TEGRA30_CLK_CCLK_G>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <3>; + clocks = <&tegra_car TEGRA30_CLK_CCLK_G>; }; }; -- 2.23.0