From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: [GIT PULL 3/8] memory: tegra: Changes for v5.5-rc1 Date: Sat, 2 Nov 2019 15:45:16 +0100 Message-ID: <20191102144521.3863321-3-thierry.reding@gmail.com> References: <20191102144521.3863321-1-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20191102144521.3863321-1-thierry.reding@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: arm@kernel.org Cc: linux-tegra@vger.kernel.org, Thierry Reding , linux-arm-kernel@lists.infradead.org, Jon Hunter List-Id: linux-tegra@vger.kernel.org Hi ARM SoC maintainers, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-5.5-memory for you to fetch changes up to 8b04225c4464422f185e62c2cedfb9e234423814: memory: tegra: Consolidate registers definition into common header (2019-11-01 10:57:37 +0100) Thanks, Thierry ---------------------------------------------------------------- memory: tegra: Changes for v5.5-rc1 This contains a couple of fixes and adds support for EMC frequency scaling on Tegra30. ---------------------------------------------------------------- Dmitry Osipenko (11): clk: tegra: Add Tegra20/30 EMC clock implementation memory: tegra: Don't set EMC rate to maximum on probe for Tegra20 memory: tegra: Adapt for Tegra20 clock driver changes memory: tegra: Include io.h instead of iopoll.h memory: tegra: Pre-configure debug register on Tegra20 memory: tegra: Print a brief info message about EMC timings memory: tegra: Increase handshake timeout on Tegra20 memory: tegra: Do not handle error from wait_for_completion_timeout() memory: tegra: Introduce Tegra30 EMC driver memory: tegra: Ensure timing control debug features are disabled memory: tegra: Consolidate registers definition into common header Sowjanya Komatineni (1): clk: Add API to get index of the clock parent Thierry Reding (3): Merge branch 'for-5.5/clk' memory: tegra: Set DMA mask based on supported address bits memory: tegra: Add gr2d and gr3d to DRM IOMMU group drivers/clk/clk.c | 17 + drivers/clk/tegra/Makefile | 2 + drivers/clk/tegra/clk-tegra20-emc.c | 293 +++++++++ drivers/clk/tegra/clk-tegra20.c | 55 +- drivers/clk/tegra/clk-tegra30.c | 38 +- drivers/clk/tegra/clk.h | 3 + drivers/memory/tegra/Kconfig | 10 + drivers/memory/tegra/Makefile | 1 + drivers/memory/tegra/mc.c | 52 +- drivers/memory/tegra/mc.h | 74 ++- drivers/memory/tegra/tegra114.c | 10 +- drivers/memory/tegra/tegra124.c | 30 +- drivers/memory/tegra/tegra20-emc.c | 134 ++-- drivers/memory/tegra/tegra30-emc.c | 1232 +++++++++++++++++++++++++++++++++++ drivers/memory/tegra/tegra30.c | 34 +- include/linux/clk-provider.h | 1 + include/linux/clk/tegra.h | 11 + include/soc/tegra/mc.h | 2 +- 18 files changed, 1797 insertions(+), 202 deletions(-) create mode 100644 drivers/clk/tegra/clk-tegra20-emc.c create mode 100644 drivers/memory/tegra/tegra30-emc.c