From: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: "Thierry Reding"
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"Jonathan Hunter"
<jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"Artur Świgoń" <a.swigon-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
"Georgi Djakov"
<georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH v2 04/22] dt-bindings: memory: tegra30: emc: Document new interconnect property
Date: Mon, 30 Mar 2020 04:08:46 +0300 [thread overview]
Message-ID: <20200330010904.27643-5-digetx@gmail.com> (raw)
In-Reply-To: <20200330010904.27643-1-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
External memory controller is interconnected with memory controller and
with external memory. Document new interconnect property which turns
external memory controller into interconnect provider.
Signed-off-by: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
.../bindings/memory-controllers/nvidia,tegra30-emc.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
index e4135bac6957..2d7aed245552 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-emc.yaml
@@ -31,6 +31,9 @@ properties:
interrupts:
maxItems: 1
+ "#interconnect-cells":
+ const: 0
+
nvidia,memory-controller:
$ref: /schemas/types.yaml#/definitions/phandle
description:
@@ -217,6 +220,7 @@ required:
- interrupts
- clocks
- nvidia,memory-controller
+ - "#interconnect-cells"
additionalProperties: false
@@ -230,6 +234,8 @@ examples:
nvidia,memory-controller = <&mc>;
+ #interconnect-cells = <0>;
+
emc-timings-1 {
nvidia,ram-code = <1>;
--
2.25.1
next prev parent reply other threads:[~2020-03-30 1:08 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 1:08 [PATCH v2 00/22] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 01/22] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko
2020-04-10 17:05 ` Rob Herring
2020-03-30 1:08 ` [PATCH v2 02/22] dt-bindings: memory: tegra20: emc: " Dmitry Osipenko
[not found] ` <20200330010904.27643-3-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-04-10 17:06 ` Rob Herring
2020-03-30 1:08 ` [PATCH v2 03/22] dt-bindings: memory: tegra30: mc: " Dmitry Osipenko
[not found] ` <20200330010904.27643-4-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-04-10 17:06 ` Rob Herring
2020-03-30 1:08 ` [PATCH v2 06/22] dt-bindings: memory: tegra20: Add memory client IDs Dmitry Osipenko
[not found] ` <20200330010904.27643-7-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-04-10 17:10 ` Rob Herring
2020-03-30 1:08 ` [PATCH v2 10/22] interconnect: Relax requirement in of_icc_get_from_provider() Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 11/22] memory: tegra: Register as interconnect provider Dmitry Osipenko
[not found] ` <20200330010904.27643-12-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-04-13 12:43 ` Georgi Djakov
[not found] ` <70f724d6-5cb2-0ebe-ffc1-5dbb77d9dc74-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2020-04-13 15:01 ` Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 12/22] memory: tegra20-emc: Use devm_platform_ioremap_resource Dmitry Osipenko
[not found] ` <20200330010904.27643-1-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-03-30 1:08 ` Dmitry Osipenko [this message]
[not found] ` <20200330010904.27643-5-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-04-10 17:07 ` [PATCH v2 04/22] dt-bindings: memory: tegra30: emc: Document new interconnect property Rob Herring
2020-03-30 1:08 ` [PATCH v2 05/22] dt-bindings: host1x: Document new interconnect properties Dmitry Osipenko
[not found] ` <20200330010904.27643-6-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-04-10 17:09 ` Rob Herring
2020-04-10 18:28 ` Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 07/22] dt-bindings: memory: tegra30: Add memory client IDs Dmitry Osipenko
[not found] ` <20200330010904.27643-8-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-04-10 17:10 ` Rob Herring
2020-03-30 1:08 ` [PATCH v2 08/22] ARM: tegra: Add interconnect properties to Tegra20 device-tree Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 09/22] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 13/22] memory: tegra20-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 16/22] memory: tegra30-emc: " Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 17/22] memory: tegra30-emc: Register as interconnect provider Dmitry Osipenko
[not found] ` <20200330010904.27643-18-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-04-13 12:44 ` Georgi Djakov
[not found] ` <d8e39d8b-b3f3-4a30-cb5a-67fcbe18a957-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2020-04-13 15:18 ` Dmitry Osipenko
2020-03-30 1:09 ` [PATCH v2 19/22] drm/tegra: dc: Tune up high priority request controls for Tegra20 Dmitry Osipenko
2020-03-30 1:09 ` [PATCH v2 20/22] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-03-30 1:09 ` [PATCH v2 21/22] ARM: tegra: Enable interconnect API in tegra_defconfig Dmitry Osipenko
2020-03-30 1:09 ` [PATCH v2 22/22] ARM: multi_v7_defconfig: Enable interconnect API Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 14/22] memory: tegra20-emc: Register as interconnect provider Dmitry Osipenko
2020-03-30 1:08 ` [PATCH v2 15/22] memory: tegra20-emc: Create tegra20-devfreq device Dmitry Osipenko
2020-03-30 1:09 ` [PATCH v2 18/22] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
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