From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v3 1/7] dt-bindings: timer: Add bindings for NVIDIA Tegra186 timers Date: Tue, 14 Apr 2020 13:10:54 -0500 Message-ID: <20200414181054.GA6655@bogus> References: <20200403202209.299823-1-thierry.reding@gmail.com> <20200403202209.299823-2-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20200403202209.299823-2-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: Daniel Lezcano , Thomas Gleixner , Thierry Reding , Dmitry Osipenko , Jon Hunter , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-tegra@vger.kernel.org On Fri, 3 Apr 2020 22:22:03 +0200, Thierry Reding wrote: > From: Thierry Reding > > The NVIDIA Tegra186 SoC contains an IP block that provides a register > interface for ten timers with a 29-bit counter that can generate one- > shot, periodic or watchdog interrupts. > > Signed-off-by: Thierry Reding > --- > Changes in v2: > - add required properties section > - add additionalProperties: false > - do not show status in example > > .../bindings/timer/nvidia,tegra186-timer.yaml | 61 +++++++++++++++++++ > 1 file changed, 61 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml > Reviewed-by: Rob Herring