From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: [PATCH 12/38] dt-bindings: mmc: tegra: Document interconnect paths Date: Fri, 12 Jun 2020 16:18:37 +0200 Message-ID: <20200612141903.2391044-13-thierry.reding@gmail.com> References: <20200612141903.2391044-1-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20200612141903.2391044-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Rob Herring Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-tegra@vger.kernel.org From: Thierry Reding Signed-off-by: Thierry Reding --- .../bindings/mmc/nvidia,tegra20-sdhci.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml index 7652c2c1ff35..70931288bc70 100644 --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml @@ -86,6 +86,19 @@ properties: iommus: $ref: "/schemas/types.yaml#/definitions/phandle-array" + interconnects: + description: A list of phandle and specifier pairs that describe the + interconnect paths to and from the SDHCI controller. + $ref: "/schemas/types.yaml#/definitions/phandle-array" + + interconnect-names: + description: One string for each pair of phandle and specifier in the + "interconnects" property. + $ref: "/schemas/types.yaml#/definitions/string-array" + items: + - const: dma-mem # read + - const: write + nvidia,default-tap: description: Specify the default inbound sampling clock trimmer value for non-tunable modes. -- 2.24.1