From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: [PATCH 30/73] ARM: tegra: Use standard names for SRAM nodes Date: Tue, 16 Jun 2020 15:51:55 +0200 Message-ID: <20200616135238.3001888-31-thierry.reding@gmail.com> References: <20200616135238.3001888-1-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thierry Reding Cc: Jon Hunter , linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: linux-tegra@vger.kernel.org From: Thierry Reding SRAM nodes should be named sram@ to match the bindings. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20.dtsi | 4 ++-- arch/arm/boot/dts/tegra30.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index ccd2995aef83..2568236284ad 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -17,14 +17,14 @@ memory@0 { reg = <0 0>; }; - iram@40000000 { + sram@40000000 { compatible = "mmio-sram"; reg = <0x40000000 0x40000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x40000000 0x40000>; - vde_pool: vde@400 { + vde_pool: sram@400 { reg = <0x400 0x3fc00>; pool; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index f838e4775cf6..690e1628860f 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -97,14 +97,14 @@ pci@3,0 { }; }; - iram@40000000 { + sram@40000000 { compatible = "mmio-sram"; reg = <0x40000000 0x40000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x40000000 0x40000>; - vde_pool: vde@400 { + vde_pool: sram@400 { reg = <0x400 0x3fc00>; pool; }; -- 2.24.1