From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: [PATCH 59/73] arm64: tegra: Add missing #phy-cells property to USB PHYs Date: Tue, 16 Jun 2020 15:52:24 +0200 Message-ID: <20200616135238.3001888-60-thierry.reding@gmail.com> References: <20200616135238.3001888-1-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thierry Reding Cc: Jon Hunter , linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: linux-tegra@vger.kernel.org From: Thierry Reding USB PHYs must have a #phy-cells property, so add one to the Tegra USB PHYs which don't have one. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra132.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi index 0425e584791b..9d1dd021a2cb 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi @@ -1113,6 +1113,7 @@ phy1: usb-phy@7d000000 { clock-names = "reg", "pll_u", "utmi-pads"; resets = <&tegra_car 22>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; + #phy-cells = <0>; nvidia,hssync-start-delay = <0>; nvidia,idle-wait-delay = <17>; nvidia,elastic-limit = <16>; @@ -1151,6 +1152,7 @@ phy2: usb-phy@7d004000 { clock-names = "reg", "pll_u", "utmi-pads"; resets = <&tegra_car 58>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; + #phy-cells = <0>; nvidia,hssync-start-delay = <0>; nvidia,idle-wait-delay = <17>; nvidia,elastic-limit = <16>; @@ -1188,6 +1190,7 @@ phy3: usb-phy@7d008000 { clock-names = "reg", "pll_u", "utmi-pads"; resets = <&tegra_car 59>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; + #phy-cells = <0>; nvidia,hssync-start-delay = <0>; nvidia,idle-wait-delay = <17>; nvidia,elastic-limit = <16>; -- 2.24.1